Mismatch in L2 load miss and Device Memory loads

Hi,

I am profiling my CUDA kernel using ncu to obtain the “Memory Workload Analysis Tables”. I observe that the L2 load misses “Sector Misses to Device” doesn’t match the loads (sectors) from device memory. In my case, the L2 load misses is “16,711,976” while the loaded sectors from device memory is only “7,788”. Why would this be?

Please let me know if you need more information.

Thanks for the help!
Rishabh Jain

If you collect the report multiple times is this behavior repeatable?

Access to the report and/or a minimal reproducible is likely required to resolve this issue.

The most common reason for this type of anomaly is that the L1/TEX Load Sectors Misses to Device was captured in a different pass than the Device Memory Load metrics and one or more of the following happened:

  1. –cache-control none is specified and on one pass the L2 cache was primed (e.g. from a previous memcpy or kernel) and on a different pass the L2 was flushed due to a GPU context switch prior to the grid.
  2. –cache-control all is specified (default if no option) and a GPU context switch occurred during the Sector Misses to Device pass. NCU can remove the impact of GPU context switch from the SM and L1TEX metrics but not from the L2 and Device Memory metrics.

There could be other issues but without a reproducible or hopefully finding more information in the report these items are just speculation.