nvcamerasrc error freezes Linux kernel

Hello!

My camera works fine with yavta - i make single frame pictures. They looks ok. But if i try to use gstreamer and nvcamera src - linux kernel stuks for 30 seconds and than restarts. This is my kernel log:

[ 2190.273592] [ar0132] ar0132_set_autoexposure ret=0
[ 2190.290347] ar0132 6-0010: [ar0132]: write i2c-dev:0x10 addr:0x3070= 0x2 - OK
[ 2190.297635] ar0132 6-0010: ret: 00
[ 2190.385521] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[ 2190.391167] ar0132 6-0010: ar0132_s_ctrl return 0
[ 2190.396028] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200B
[ 2190.402501] ar0132 6-0010: ar0132_s_ctrl return 0
[ 2190.407264] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200C
[ 2190.412893] ar0132 6-0010: ar0132_s_ctrl return 0
[ 2190.417632] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[ 2190.423301] ar0132 6-0010: ar0132_s_ctrl return 0
[ 2192.096304] fence timeout on [ffffffc0d8335800] after 1500ms
[ 2192.102033] name=[nvhost_sync:7], current value=0 waiting value=1
[ 2192.108181] fence timeout on [ffffffc07d3b4000] after 1500ms
[ 2192.113877] name=[nvhost_sync:8], current value=0 waiting value=1
[ 2192.120005] fence timeout on [ffffffc07a208700] after 1500ms
[ 2192.125744] name=[nvhost_sync:39], current value=1 waiting value=2
[ 2192.131965] ---- mlocks ----
[ 2192.134889] 
[ 2192.136409] ---- syncpts ----
[ 2192.139395] id 1 (disp1_a) min 1106 max 1106 refs 1 (previous client : )
[ 2192.146126] ---- mlocks ----
[ 2192.149057] 
[ 2192.150553] ---- syncpts ----
[ 2192.153555] ---- mlocks ----
[ 2192.156476] 
[ 2192.157972] ---- syncpts ----
[ 2192.160991] id 2 (disp1_b) min 2 max 2 refs 1 (previous client : )
[ 2192.167200] id 3 (disp1_c) min 2 max 2 refs 1 (previous client : )

i think error may be in device tree, but how it can work fine with yavta?

i2c@546c0000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			compatible = "nvidia,tegra210-vii2c";
			reg = <0x0 0x546c0000 0x0 0x34000>;
			iommus = <0x52 0x12>;
			interrupts = <0x0 0x11 0x4>;
			scl-gpio = <0x7b 0x92 0x0>;
			sda-gpio = <0x7b 0x93 0x0>;
			status = "okay";
			clocks = <0x41 0xd0 0x41 0x51 0x41 0x1c>;
			clock-names = "vii2c", "i2cslow", "host1x";
			resets = <0x41 0xd0>;
			reset-names = "vii2c";
			clock-frequency = <0x186A0>;
			bus-pullup-supply = <0x69>;
			avdd_dsi_csi-supply = <0x67>;
			linux,phandle = <0xe0>;
			phandle = <0xe0>;

			ar0132_c@10 {
				compatible = "nvidia,ar0132";
			    	reg = <0x10>;//<0x30>;
        			status = "okay";
				devnode = "video0";
				physical_w = "3.674";
				physical_h = "2.738";
				vertical-flip = "true";
				avdd-reg = "vana";
				iovdd-reg = "vif";
				clocks = <0x41 0x117>;
				clock-names = "clk_out_3";
				clock-frequency = <0x17D7840>;
				mclk = "clk_out_3";
				vana-supply = <0x94>;
				vif-supply = <0x93>;
				
				mode0 {
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_c";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";
					//embedded_metadata_height = "0";

					active_w = "1650";
					active_h = "990";
					pixel_t = "bayer_bggr"; //10bits

					readout_orientation = "0";
					line_length = "1650";
					
					inherent_gain = "1";
					mclk_multiplier = "3.125";
					pix_clk_hz = "75000000";
					
					min_gain_val = "0";//"1.0";
					max_gain_val = "16";//"16";
					min_hdr_ratio = [31 00];//1
					max_hdr_ratio = "64";//"1";
					min_framerate = "1.5";//"1.816577";
					max_framerate = "45";
					min_exp_time = "34";//"34";
					max_exp_time = "660000";//"550385";
				};
				
				ports {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					port@0 {
						reg = <0x0>;

						ap0100_out0: endpoint {
							csi-port = <0x2>;
							bus-width = <0x4>;
							remote-endpoint = <&csi_in0>;
							linux,phandle = <0xea>;
							phandle = <0xea>;
						};
					};
				};
			};
		};

		nvcsi {
			num-channels = <0x1>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			linux,phandle = <0xe7>;
			phandle = <0xe7>;

			channel@0 {
				reg = <0x0>;
				status = "okay";
				linux,phandle = <0xe8>;
				phandle = <0xe8>;

				ports {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					port@0 {
						reg = <0x0>;
						status = "okay";
						linux,phandle = <0xe9>;
						phandle = <0xe9>;

						csi_in0: endpoint@0 {
							csi-port = <0x2>;
							bus-width = <0x4>;
							remote-endpoint = <&ap0100_out0>;
							status = "okay";
							linux,phandle = <0x96>;
							phandle = <0x96>;
						};
					};

					port@1 {
						reg = <0x1>;
						status = "okay";
						linux,phandle = <0xeb>;
						phandle = <0xeb>;

						csi_out0: endpoint@1 {
							remote-endpoint = <&vi_in0>;
							status = "okay";
							linux,phandle = <0x81>;
							phandle = <0x81>;
						};
					};
				};
			};
tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		num_csi_lanes = <0x4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <0x2>;
		vi_bw_margin_pct = <0x19>;
		max_pixel_rate = <0x639c0>;
		isp_peak_byte_per_pixel = <0x2>;
		isp_bw_margin_pct = <0x19>;
		linux,phandle = <0xec>;
		phandle = <0xec>;

		modules {

			module0 {
				badge = "ar0132_rear_AR0132";
				position = "bottom";
				orientation = [33 00];
				status = "okay";
				linux,phandle = <0xe2>;
				phandle = <0xe2>;

				drivernode0 {
					pcl_id = "v4l2_sensor";
					devname = "ar0132 6-0010";
					proc-device-tree = "/proc/device-tree/host1x/i2c@546c0000/ar0132_c@10";
					status = "okay";
					linux,phandle = <0xe3>;
					phandle = <0xe3>;
				};

				drivernode1 {
					pcl_id = "v4l2_lens";
					proc-device-tree = "/proc/device-tree/e3326_lens_ap0100@P5V27C/";
					status = "okay";
					linux,phandle = <0xe4>;
					phandle = <0xe4>;
				};
			};
		};
	};

I also try to change line_length, discontinuous_clk and cil_settletime. there is no effect.

how to find and fix error source?
Thanks a lot!

The pix_clk_hz looks like not right.
Try modify max_pixel_rate to 750000.

Why you think that pix_clk_hz is not right? My sensor My sensor provide it to serializer and i check this value with oscilloscope.

i try max_pixel_rate to 750000

tegra-camera-platform {
		compatible = "nvidia, tegra-camera-platform";
		num_csi_lanes = <0x4>;
		max_lane_speed = <1500000>;
		min_bits_per_pixel = <10>;
		vi_peak_byte_per_pixel = <0x2>;
		vi_bw_margin_pct = <0x19>;
		//max_pixel_rate = <0x639c0>;
		max_pixel_rate = <0xB71B0>;
		isp_peak_byte_per_pixel = <0x2>;
		isp_bw_margin_pct = <0x19>;
		linux,phandle = <0xec>;
		phandle = <0xec>;

kernel log here:

[   51.026986] [ar0132] ar0132_set_autoexposure ret=0
[   51.041882] ar0132 6-0010: [ar0132]: write i2c-dev:0x10 addr:0x3070= 0x0 - OK
[   51.049038] ar0132 6-0010: ret: 00
[   51.096946] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[   51.102628] ar0132 6-0010: ar0132_s_ctrl return 0
[   51.107400] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200B
[   51.113035] ar0132 6-0010: ar0132_s_ctrl return 0
[   51.117766] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200C
[   51.123384] ar0132 6-0010: ar0132_s_ctrl return 0
[   51.128122] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[   51.133741] ar0132 6-0010: ar0132_s_ctrl return 0
[   84.064569] Watchdog detected hard LOCKUP on cpu 0
[   84.069256] ------------[ cut here ]------------
[   84.074077] WARNING: at ../kernel/watchdog.c:352
[   84.078701] Modules linked in: bcmdhd bluedroid_pm
[   84.083556] 
[   84.085073] CPU: 3 PID: 0 Comm: swapper/3 Not tainted 4.4.38-test-tegra210-defconfig #158
[   84.093252] Hardware name: jetson_tx1 (DT)
[   84.097359] task: ffffffc0fb322580 ti: ffffffc0fb330000 task.ti: ffffffc0fb330000
[   84.104875] PC is at watchdog_check_hardlockup_other_cpu+0xec/0x13c
[   84.111152] LR is at watchdog_check_hardlockup_other_cpu+0xec/0x13c
[   84.117425] pc : [<ffffffc00013fb2c>] lr : [<ffffffc00013fb2c>] pstate: 600001c5
[   84.124821] sp : ffffffc0fb333ac0
[   84.128143] x29: ffffffc0fb333ac0 x28: 0000000000000000 
[   84.133495] x27: 7fffffffffffffff x26: ffffffc0ffe74c98 
[   84.138847] x25: ffffffc0ffe74cd0 x24: ffffffc0fb333d90 
[   84.144196] x23: 0000000000000000 x22: 000000000000004a 
[   84.149544] x21: ffffffc001291238 x20: ffffffc0012bcfb0 
[   84.154894] x19: 0000000000000000 x18: 0000000000000000 
[   84.160242] x17: 0000000000000000 x16: 0000000000000000 
[   84.165588] x15: 0000000000000000 x14: 0000000000000000 
[   84.170935] x13: 0000000034d5d91d x12: 0000000001000000 
[   84.176283] x11: 0000000000000000 x10: 0000000000001000 
[   84.181630] x9 : ffffffc000083000 x8 : ffffffc0002f064c 
[   84.186977] x7 : 0000000000000000 x6 : 0000000000000030 
[   84.192323] x5 : 206e6f2050554b43 x4 : 0000000000000000 
[   84.197670] x3 : 0000000000000000 x2 : 0000000000009dbc 
[   84.203019] x1 : 0000000000010001 x0 : 0000000000000026 
[   84.208363] 
[   84.209866] ---[ end trace d46c0e2e229b79e4 ]---
[   84.214489] Call trace:
[   84.216953] [<ffffffc00013fb2c>] watchdog_check_hardlockup_other_cpu+0xec/0x13c
[   84.224269] [<ffffffc00013fc70>] watchdog_timer_fn+0x4c/0x23c
[   84.230026] [<ffffffc00010b4cc>] __run_hrtimer+0x1d8/0x2f8
[   84.235522] [<ffffffc00010b670>] __hrtimer_run_queues+0x84/0xb0
[   84.241451] [<ffffffc00010b97c>] hrtimer_interrupt+0xac/0x1c8
[   84.247214] [<ffffffc00084a1fc>] tegra210_timer_isr+0x28/0x34
[   84.252974] [<ffffffc0000f76ec>] handle_irq_event_percpu+0xf8/0x26c
[   84.259247] [<ffffffc0000f78a8>] handle_irq_event+0x48/0x78
[   84.264829] [<ffffffc0000faf98>] handle_fasteoi_irq+0xb0/0xf4
[   84.270581] [<ffffffc0000f6b44>] generic_handle_irq+0x18/0x2c
[   84.276334] [<ffffffc0000f7020>] __handle_domain_irq+0x80/0xac
[   84.282190] [<ffffffc000080ba0>] gic_handle_irq+0x6c/0xb8
[   84.287598] [<ffffffc000083f44>] el1_irq+0x84/0x100
[   84.292488] [<ffffffc000811224>] cpuidle_enter+0x18/0x20
[   84.297811] [<ffffffc0000e6768>] call_cpuidle+0x4c/0x58
[   84.303046] [<ffffffc0000e6840>] cpuidle_idle_call+0xcc/0x120
[   84.308803] [<ffffffc0000e6af0>] cpu_idle_loop+0x25c/0x27c
[   84.314298] [<ffffffc0000e6b20>] convert_prio+0x0/0x3c
[   84.319450] [<ffffffc00008f1fc>] secondary_start_kernel+0x16c/0x178
[   84.325721] [<0000000080080e8c>] 0x80080e8c

nvcamera-daemon log looks:
https://cloud.mail.ru/public/Dc9D/g5qt7PbGd/IMG_20180607_003344.jpg

If i change

pixel_t = "bayer_bggr";

to

pixel_t = "bayer_rggb10";

kernel stop freezing. Nvcamera-daemon tells, that “sensor has unknown pixel format”

PCLHW_DTParser
LoadOverridesFile: looking for override file [/Calib/camera_override.isp] 1/16LoadOverridesFile: looking for override file [/data/nvcam/settings/camera_overrides.isp] 2/16LoadOverridesFile: looking for override file [/opt/nvidia/nvcam/settings/camera_overrides.isp] 3/16LoadOverridesFile: looking for override file [/var/nvidia/nvcam/settings/camera_overrides.isp] 4/16LoadOverridesFile: looking for override file [/data/nvcam/camera_overrides.isp] 5/16LoadOverridesFile: looking for override file [/data/nvcam/settings/e3323_bottom_CH06P1.isp] 6/16LoadOverridesFile: looking for override file [/opt/nvidia/nvcam/settings/e3323_bottom_CH06P1.isp] 7/16LoadOverridesFile: looking for override file [/var/nvidia/nvcam/settings/e3323_bottom_CH06P1.isp] 8/16---- imager: No override file found. ----
SCF: Error BadParameter: Unknown sensor pixel type (in src/common/Utils.cpp, function translateColorFormat(), line 403)
SCF: Error BadParameter:  (propagating from src/services/capture/CaptureServiceDeviceSensor.cpp, function open(), line 132)
SCF: Error BadParameter:  (propagating from src/services/capture/CaptureServiceDeviceSensor.cpp, function getSourceFromGuid(), line 593)
SCF: Error BadParameter:  (propagating from src/services/capture/CaptureService.cpp, function addSourceByGuid(), line 781)
SCF: Error BadParameter:  (propagating from src/api/CameraDriver.cpp, function addSourceByIndex(), line 276)
SCF: Error BadParameter:  (propagating from src/api/CameraDriver.cpp, function getSource(), line 439)
Segmentation fault

my static int extract_pixel_format function is:

else if (strncmp(pixel_t, "bayer_rggb10", size) == 0)
		*format = V4L2_PIX_FMT_SRGGB10;

in static const struct camera_common_colorfmt camera_common_color_fmts i have:

{
		MEDIA_BUS_FMT_SRGGB10_1X10,
		V4L2_COLORSPACE_RAW,
		V4L2_PIX_FMT_SRGGB10,
	},

and in my driver:

#define AR0132_DEFAULT_MODE ar0132_FULL_RES_45FPS
#define AR0132_DEFAULT_DATAFMT MEDIA_BUS_FMT_SRGGB10_1X10

static const struct camera_common_frmfmt ar0132_frmfmt = {
{{640, 360}, ar0132_30fps, 1, 0, ar0132_640x360_BINNED},
{{640, 480}, ar0132_30fps, 1, 0, ar0132_640x480_BINNED},
{{1280, 720}, ar0132_60fps, 1, 0, ar0132_720P_60FPS},
{{1280, 960}, ar0132_45fps, 1, 0, ar0132_FULL_RES_45FPS},
};

common_data->ops = &ar0132_common_ops;
common_data->ctrl_handler = &priv->ctrl_handler;
common_data->i2c_client = client;
common_data->frmfmt = &ar0132_frmfmt[0];
common_data->colorfmt = camera_common_find_datafmt(AR0132_DEFAULT_DATAFMT);
common_data->power = &priv->power;
common_data->ctrls = priv->ctrls;
common_data->priv = (void *)priv;
common_data->numctrls = ARRAY_SIZE(ctrl_config_list);
common_data->numfmts = ARRAY_SIZE(ar0132_frmfmt);

common_data->def_mode = AR0132_DEFAULT_MODE;

And tell me please where can i see sources of nvcamera-daemon?

  1. You DT report 1650x990 but kernel driver didn’t have this mode? And sorry for nvcamera-daemon source didn’t public.

     			active_w = "1650";
     			active_h = "990";
    

static const struct camera_common_frmfmt ar0132_frmfmt = {
{{640, 360}, ar0132_30fps, 1, 0, ar0132_640x360_BINNED},
{{640, 480}, ar0132_30fps, 1, 0, ar0132_640x480_BINNED},
{{1280, 720}, ar0132_60fps, 1, 0, ar0132_720P_60FPS},
{{1280, 960}, ar0132_45fps, 1, 0, ar0132_FULL_RES_45FPS},
};

  1. Remove all of the mode in kernel driver just leave a workable table for debug.

ShaneCCC, thanks, i found the issue: in Set Control chapter of Development Guide written, that only TEGRA_CAMERA_CID_GAIN, V4L2 CID_FRAME_RATE and TEGRA_CAMERA_CID_EXPOSURE are mandatory.
But also i need in V4L2_CID_GROUP_HOLD and V4L2_CID_HDR_EN. I modified device tree:

mode0 {
					mclk_khz = "24000";
					num_lanes = "4";
					tegra_sinterface = "serial_c";
					discontinuous_clk = "no";
					dpcm_enable = "false";
					cil_settletime = "0";

					active_w = "1280";//"1650"; //
					active_h = "960";//"990";//

					//pixel_t = "bayer_bggr10";
					//pixel_t = "bayer_bggr";

		dynamic_pixel_bit_depth = "10";
		csi_pixel_bit_depth = "10";
		mode_type = "bayer";
		pixel_phase = "rggb";

		//embedded_metadata_height = "4";

					readout_orientation = "0";
					line_length = "1280";//"1650";//1280
					
					inherent_gain = "1";
					mclk_multiplier = "3.125";
					pix_clk_hz = "75000000";
					
					min_gain_val = "0";//"1.0";
					max_gain_val = "16";//"16";
					min_hdr_ratio = [31 00];//1
					max_hdr_ratio = "64";//"1";
					min_framerate = "1.816577";
					max_framerate = "45";
					min_exp_time = "34";//"34";
					max_exp_time = "660000";//"550385";
				};
				
				ports {
					#address-cells = <0x1>;
					#size-cells = <0x0>;

					port@0 {
						reg = <0x0>;

						ap0100_out0: endpoint {
							csi-port = <0x2>;
							bus-width = <0x4>;
							remote-endpoint = <&csi_in0>;
							linux,phandle = <0xea>;
							phandle = <0xea>;
						};
					};
				};

With yavta i can get image from camera.

If i dont have V4L2_CID_HDR_EN ctrl in my driver and i make “gst-launch-1.0 nvcamerasrc ! nvoverlaysink” i have error - "could not find device ctrl” and i see the green screen.

If i added V4L2_CID_HDR_EN ctrl to driver i see this in dmesg:

[  543.950570] [ar0132] ar0132_set_autoexposure ret=0
[  543.966900] ar0132 6-0010: [ar0132]: write i2c-dev:0x10 addr:0x3070= 0x0 - OK
[  543.974639] ar0132 6-0010: ret: 00
[  544.024625] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[  544.030396] ar0132 6-0010: ar0132_s_ctrl return 0
[  544.037229] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200B
[  544.043424] ar0132 6-0010: ar0132_s_ctrl return 0
[  544.048601] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200C
[  544.054753] ar0132 6-0010: ar0132_s_ctrl return 0
[  544.060552] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[  544.066418] ar0132 6-0010: ar0132_s_ctrl return 0
[  545.568917] fence timeout on [ffffffc0c9a4c600] after 1500ms
[  545.572821] fence timeout on [ffffffc0c9a4ce00] after 1500ms
[  545.572826] name=[nvhost_sync:7], current value=0 waiting value=1
[  545.572830] ---- mlocks ----
[  545.572840] 
[  545.572842] ---- syncpts ----
[  545.572847] id 1 (disp1_a) min 1013 max 1014 refs 1 (previous client : )
[  545.572850] id 2 (disp1_b) min 1 max 3 refs 1 (previous client : )

and this in nvcamera-daemon:

LSC: LSC surface is not based on full res!
error in files 
common.cfg Line 3177 fd.Available=TRUE
common.cfg Line 3178 fd.ForceEnable=False

Please tell me what mean “LSC surface is not based on full res!” in camera-daemon logs.

Also I try to comment using of V4L2_CID_HDR_EN in camera_common.c, but in this case i have:

[  899.748683] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200C
[  899.754639] ar0132 6-0010: ar0132_s_ctrl return 0
[  899.759357] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[  899.764973] ar0132 6-0010: ar0132_s_ctrl return 0
[  902.224791] tegra-i2c 7000d000.i2c: pio xfer timed out addr: 0x3c
[  902.230938] tegra-i2c 7000d000.i2c: --- register dump for debugging ----
[  902.238098] tegra-i2c 7000d000.i2c: I2C_CNFG - 0x22c00
[  902.243429] tegra-i2c 7000d000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x1010001
[  902.250487] tegra-i2c 7000d000.i2c: I2C_FIFO_CONTROL - 0xe0
[  902.256241] tegra-i2c 7000d000.i2c: I2C_FIFO_STATUS - 0x800081
[  902.262251] tegra-i2c 7000d000.i2c: I2C_INT_MASK - 0x7d
[  902.267657] tegra-i2c 7000d000.i2c: I2C_INT_STATUS - 0xc3
[  902.273236] tegra-i2c 7000d000.i2c: i2c transfer timed out addr: 0x3c
[  902.279891] max77620-gpio max77620-gpio: CNFG_GPIOx read failed: -110

I really dont understand what i need to do to “gst-launch-1.0 nvcamerasrc ! nvoverlaysink” will show me video from camera. May be you can help me?

  1. I don’t think the “V4L2_CID_HDR_EN” and “LSC surface is not based on full res!” are the root cause. You can just waive LSC error.

  2. Try to make the below function to a dummy function to try both v4l2-ctl and gstreamer.

static int ov5693_set_gain(struct ov5693 *priv, s32 val);
static int ov5693_set_frame_length(struct ov5693 *priv, s32 val);
static int ov5693_set_coarse_time(struct ov5693 *priv, s32 val);
static int ov5693_set_coarse_time_short(struct ov5693 *priv, s32 val);

ShaneCCC, thanks a lot for your help!

2. Try to make the below function to a dummy function to try both v4l2-ctl and gstreamer.

ok, now my driver source looks like this:

static int ar0132_set_gain(struct ar0132_priv *priv, s32 val)
{
	return 0;
}

static int ar0132_set_frame_length(struct ar0132_priv *priv, s32 val)
{
        u32 frame_length;
	
	frame_length = (u32)val;
	priv->frame_length = frame_length;

	return 0;
}

static int ar0132_set_coarse_time(struct ar0132_priv *priv, s32 val)
{
	return 0;
}

static int ar0132_set_coarse_time_short(struct ar0132_priv *priv, s32 val)
{	
	int err;
	struct v4l2_control hdr_control;
	int hdr_en;
	u32 coarse_time_short;
		
	hdr_control.id = V4L2_CID_HDR_EN;

	err = camera_common_g_ctrl(priv->s_data, &hdr_control);
	if (err < 0) {
		dev_err(&priv->i2c_client->dev,
			"could not find device ctrl.\n");
		return err;
	}

	hdr_en = switch_ctrl_qmenu[hdr_control.value];
	if (hdr_en == SWITCH_OFF)
		return 0;

	coarse_time_short = (u32)val;
	return 0;
}

static const struct v4l2_ctrl_config ctrl_config_list[] = {
		{
			.ops = &ar0132_ctrl_ops,
			.id = V4L2_CID_HDR_EN,
			.name = "HDR enable",
			.type = V4L2_CTRL_TYPE_INTEGER_MENU,
			.min = 0,
			.max = ARRAY_SIZE(switch_ctrl_qmenu) - 1,
			.menu_skip_mask = 0,
			.def = 0,
			.qmenu_int = switch_ctrl_qmenu,
		},
	
		{
		.ops = &ar0132_ctrl_ops,
		.id = V4L2_CID_GAIN,
		.name = "Gain",
		.type = V4L2_CTRL_TYPE_INTEGER64,
		.flags = V4L2_CTRL_FLAG_SLIDER,
		.min = 0 * FIXED_POINT_SCALING_FACTOR,
		.max = 48 * FIXED_POINT_SCALING_FACTOR,
		.def = 0 * FIXED_POINT_SCALING_FACTOR,
		.step = 1 * FIXED_POINT_SCALING_FACTOR,
	},
	{
		.ops = &ar0132_ctrl_ops,
		.id = V4L2_CID_FRAME_LENGTH,
		.name = "Frame Length",
		.type = V4L2_CTRL_TYPE_INTEGER,
		.flags = V4L2_CTRL_FLAG_SLIDER,
		.min = OV5693_MIN_FRAME_LENGTH,  // i use defines from OV5693
		.max = OV5693_MAX_FRAME_LENGTH,
		.def = OV5693_DEFAULT_FRAME_LENGTH,
		.step = 1,
	},
	{
		.ops = &ar0132_ctrl_ops,
		.id = V4L2_CID_COARSE_TIME,
		.name = "Coarse Time",
		.type = V4L2_CTRL_TYPE_INTEGER,
		.flags = V4L2_CTRL_FLAG_SLIDER,
		.min = OV5693_MIN_EXPOSURE_COARSE,
		.max = OV5693_MAX_EXPOSURE_COARSE,
		.def = OV5693_DEFAULT_EXPOSURE_COARSE,
		.step = 1,
	},
	{
		.ops = &ar0132_ctrl_ops,
		.id = V4L2_CID_COARSE_TIME_SHORT,
		.name = "Coarse Time Short",
		.type = V4L2_CTRL_TYPE_INTEGER,
		.flags = V4L2_CTRL_FLAG_SLIDER,
		.min = OV5693_MIN_EXPOSURE_COARSE,
		.max = OV5693_MAX_EXPOSURE_COARSE,
		.def = OV5693_DEFAULT_EXPOSURE_COARSE,
		.step = 1,
	},
	{
		.ops = &ar0132_ctrl_ops,
		.id = V4L2_CID_GROUP_HOLD,
		.name = "Group Hold",
		.type = V4L2_CTRL_TYPE_INTEGER_MENU,
		.min = 0,
		.max = ARRAY_SIZE(switch_ctrl_qmenu) - 1,
		.menu_skip_mask = 0,
		.def = 0,
		.qmenu_int = switch_ctrl_qmenu,
	},
	
};

static int ar0132_s_ctrl(struct v4l2_ctrl *ctrl)
{
	struct ar0132_priv  *priv = container_of(ctrl->handler, struct ar0132_priv , ctrl_handler);	
	struct i2c_client *client = priv->i2c_client;
	int ret = 0;
	int data = 0;
	//int state;

	dev_err(&client->dev, "ar0132_s_ctrl with ctrl 0x%04X\n", ctrl->id);
	
	switch (ctrl->id) {		
		case V4L2_CID_GAIN:
			ret = ar0132_set_gain(priv, ctrl->val);
			//	...
			break;	
			
	case V4L2_CID_FRAME_LENGTH:
		ret = ar0132_set_frame_length(priv, ctrl->val);
		break;
	case V4L2_CID_COARSE_TIME:
		ret = ar0132_set_coarse_time(priv, ctrl->val);
		break;
	case V4L2_CID_COARSE_TIME_SHORT:
		ret = ar0132_set_coarse_time_short(priv, ctrl->val);
		break;			
			
		case V4L2_CID_FRAME_RATE:
			
			
			break;
			
		case V4L2_CID_GROUP_HOLD:
			
		if (switch_ctrl_qmenu[ctrl->val] == SWITCH_ON) {
			priv->group_hold_en = true;
		} else {
			priv->group_hold_en = false;
			ret = ar0132_set_group_hold(priv);
		}
		break;
			
	case V4L2_CID_HDR_EN:			
		break;	
	default:
		goto out;
	
	}	

out:	
	dev_err(&client->dev, "ar0132_s_ctrl return %d\n", ret);
	return ret;
}

when i start gst-launch in dmesg:

[  616.419027] [ar0132] ar0132_set_autoexposure ret=0
[  616.435243] ar0132 6-0010: [ar0132]: write i2c-dev:0x10 addr:0x3070= 0x0 - OK
[  616.442865] ar0132 6-0010: ret: 00
[  616.496579] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[  616.502502] ar0132 6-0010: ar0132_s_ctrl return 0
[  616.507314] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200B
[  616.513052] ar0132 6-0010: ar0132_s_ctrl return 0
[  616.517797] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A200C
[  616.523439] ar0132 6-0010: ar0132_s_ctrl return 0
[  616.528185] ar0132 6-0010: ar0132_s_ctrl with ctrl 0x9A2003
[  616.533797] ar0132 6-0010: ar0132_s_ctrl return 0
[  619.029622] tegra-i2c 7000d000.i2c: pio xfer timed out addr: 0x3c
[  619.035716] tegra-i2c 7000d000.i2c: --- register dump for debugging ----
[  619.042457] tegra-i2c 7000d000.i2c: I2C_CNFG - 0x22c00
[  619.047595] tegra-i2c 7000d000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x1010001
[  619.054465] tegra-i2c 7000d000.i2c: I2C_FIFO_CONTROL - 0xe0
[  619.060031] tegra-i2c 7000d000.i2c: I2C_FIFO_STATUS - 0x800081
[  619.065857] tegra-i2c 7000d000.i2c: I2C_INT_MASK - 0x7d
[  619.071075] tegra-i2c 7000d000.i2c: I2C_INT_STATUS - 0xc3
[  619.076472] tegra-i2c 7000d000.i2c: i2c transfer timed out addr: 0x3c
[  619.082940] max77620-gpio max77620-gpio: CNFG_GPIOx read failed: -110
[  621.085638] tegra-i2c 7000d000.i2c: pio xfer timed out addr: 0x3c
[  621.091729] tegra-i2c 7000d000.i2c: --- register dump for debugging ----
[  621.098460] tegra-i2c 7000d000.i2c: I2C_CNFG - 0x22c00
[  621.103615] tegra-i2c 7000d000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x1010001
[  621.110505] tegra-i2c 7000d000.i2c: I2C_FIFO_CONTROL - 0xe0
[  621.116090] tegra-i2c 7000d000.i2c: I2C_FIFO_STATUS - 0x800081
[  621.121934] tegra-i2c 7000d000.i2c: I2C_INT_MASK - 0x7d
[  621.127171] tegra-i2c 7000d000.i2c: I2C_INT_STATUS - 0xc3
[  621.132588] tegra-i2c 7000d000.i2c: i2c transfer timed out addr: 0x3c
[  621.139071] max77620-gpio max77620-gpio: CNFG_GPIOx read failed: -110
[  623.145656] tegra-i2c 7000d000.i2c: pio xfer timed out addr: 0x3c
[  623.151750] tegra-i2c 7000d000.i2c: --- register dump for debugging ----
[  623.158484] tegra-i2c 7000d000.i2c: I2C_CNFG - 0x22c00
[  623.163642] tegra-i2c 7000d000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x1010001
[  623.170531] tegra-i2c 7000d000.i2c: I2C_FIFO_CONTROL - 0xe0
[  623.176115] tegra-i2c 7000d000.i2c: I2C_FIFO_STATUS - 0x800081
[  623.181959] tegra-i2c 7000d000.i2c: I2C_INT_MASK - 0x7d
[  623.187248] tegra-i2c 7000d000.i2c: I2C_INT_STATUS - 0xc3
[  623.192664] tegra-i2c 7000d000.i2c: i2c transfer timed out addr: 0x3c
[  623.199150] max77620-gpio max77620-gpio: CNFG_GPIO_OUT update failed: -110
[  626.561699] mmc0: Timeout waiting for hardware interrupt.
[  626.567089] sdhci: =========== REGISTER DUMP (mmc0)===========
[  626.572908] sdhci: Sys addr: 0x000000c0 | Version:  0x00000303
[  626.578727] sdhci: Blk size: 0x00007200 | Blk cnt:  0x00000000
[  626.584545] sdhci: Argument: 0x00000003 | Trn mode: 0x00000023
[  626.590363] sdhci: Present:  0x01fb00f0 | Host ctl: 0x00000034
[  626.596181] sdhci: Power:    0x00000001 | Blk gap:  0x00000000
[  626.601999] sdhci: Wake-up:  0x00000000 | Clock:    0x00000007
[  626.607817] sdhci: Timeout:  0x0000000e | Int stat: 0x00000003
[  626.613635] sdhci: Int enab: 0x02ff000b | Sig enab: 0x02fc000b
[  626.619452] sdhci: AC12 err: 0x00000000 | Slot int: 0x00000000
[  626.625270] sdhci: Caps:     0x376cd08c | Caps_1:   0x10006f73
[  626.631087] sdhci: Cmd:      0x0000261b | Max curr: 0x00000000
[  626.636904] sdhci: Host ctl2: 0x0000300d
[  626.640816] sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000080000020
[  626.647326] sdhci: ===========================================
[  626.653178] host1x 50000000.host1x: cdma_handle_timeout: timeout: 28 (54080000.vi_0) client 7, HW thresh 0, done 1
[  626.663526] mmc_erase: erase error -110, status 0x0
[  626.668404] blk_update_request: I/O error, dev mmcblk0, sector 8126498
[  626.674962] host1x 50000000.host1x: cdma_handle_timeout: timeout: 42 (54080000.vi_4) client 7, HW thresh 1, done 1
[  626.685300] host1x 50000000.host1x: cdma_handle_timeout: timeout: 39 (54080000.vi_2) client 7, HW thresh 1, done 1
[  626.695638] ---- mlocks ----
[  626.698527] 
[  626.700011] ---- syncpts ----
[  626.702980] id 1 (disp1_a) min 1118 max 1118 refs 1 (previous client : )
[  626.709676] id 2 (disp1_b) min 2 max 2 refs 1 (previous client : )
[  626.715852] id 3 (disp1_c) min 2 max 2 refs 1 (previous client : )
[  626.722025] id 4 (57000000.gpu_507) min 15608 max 15608 refs 1 (previous client : )
[  626.729674] id 5 (57000000.gpu_506) min 34 max 34 refs 1 (previous client : )
[  626.736804] id 6 (57000000.gpu_505) min 8220 max 8220 refs 1 (previous client : 57000000.gpu_505)
[  626.745665] id 7 (54600000.isp_0) min 0 max 3 refs 4 (previous client : )
[  626.752446] id 8 (54600000.isp_1) min 0 max 3 refs 4 (previous client : )
[  626.759230] id 9 (54600000.isp_2) min 7 max 16 refs 11 (previous client : )
[  626.766185] id 11 (54600000.isp_3) min 1 max 3 refs 4 (previous client : )
[  626.773055] id 16 (57000000.gpu_504) min 1222 max 1222 refs 1 (previous client : )
[  626.780618] id 17 (57000000.gpu_503) min 2 max 2 refs 1 (previous client : )
[  626.787658] id 18 (57000000.gpu_502) min 2 max 2 refs 1 (previous client : )
[  626.794698] id 19 (57000000.gpu_501) min 2 max 2 refs 1 (previous client : )
[  626.801740] id 20 (57000000.gpu_500) min 2 max 2 refs 1 (previous client : )
[  626.808779] id 21 (57000000.gpu_499) min 8 max 8 refs 1 (previous client : )
[  626.815822] id 22 (57000000.gpu_491) min 6 max 6 refs 1 (previous client : 54080000.vi_0)
[  626.823992] id 23 (57000000.gpu_490) min 6 max 6 refs 1 (previous client : 54080000.vi_1)
[  626.832160] id 24 (57000000.gpu_489) min 7 max 7 refs 1 (previous client : 54080000.vi_2)
[  626.840328] id 25 (57000000.gpu_488) min 6 max 6 refs 1 (previous client : 54080000.vi_5)
[  626.848498] id 27 (vblank1) min 22907 max 0 refs 1 (previous client : )
[  626.855105] id 28 (54080000.vi_0) min 0 max 3 refs 4 (previous client : 54080000.vi_3)
[  626.863015] id 32 (57000000.gpu_498) min 1060 max 1060 refs 1 (previous client : )
[  626.870578] id 33 (57000000.gpu_497) min 2 max 2 refs 1 (previous client : )
[  626.877619] id 34 (57000000.gpu_496) min 2 max 2 refs 1 (previous client : )
[  626.884660] id 35 (57000000.gpu_495) min 2 max 2 refs 1 (previous client : )
[  626.891702] id 36 (57000000.gpu_494) min 2 max 2 refs 1 (previous client : )
[  626.898743] id 37 (57000000.gpu_492) min 4 max 4 refs 1 (previous client : )

when i start v4l-compliance:

nvidia@tegra-ubuntu:~$ v4l2-compliance
Driver Info:
	Driver name   : tegra-video
	Card type     : vi-output, ar0132 6-0010
	Bus info      : platform:54080000.vi:2
	Driver version: 4.4.38
	Capabilities  : 0x84200001
		Video Capture
		Streaming
		Extended Pix Format
		Device Capabilities
	Device Caps   : 0x04200001
		Video Capture
		Streaming
		Extended Pix Format

Compliance test for device /dev/video0 (not using libv4l2):

Required ioctls:
	test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
	test second video open: OK
	test VIDIOC_QUERYCAP: OK
	test VIDIOC_G/S_PRIORITY: OK

Debug ioctls:
	test VIDIOC_DBG_G/S_REGISTER: OK
	test VIDIOC_LOG_STATUS: OK

Input ioctls:
	test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
	test VIDIOC_ENUMAUDIO: OK (Not Supported)
	test VIDIOC_G/S/ENUMINPUT: OK
	test VIDIOC_G/S_AUDIO: OK (Not Supported)
	Inputs: 1 Audio Inputs: 0 Tuners: 0

Output ioctls:
	test VIDIOC_G/S_MODULATOR: OK (Not Supported)
	test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
	test VIDIOC_ENUMAUDOUT: OK (Not Supported)
	test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
	test VIDIOC_G/S_AUDOUT: OK (Not Supported)
	Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
	test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
	test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
	test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
	test VIDIOC_G/S_EDID: OK (Not Supported)

Test input 0:

	Control ioctls:
		test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
		test VIDIOC_QUERYCTRL: OK
		test VIDIOC_G/S_CTRL: OK
		test VIDIOC_G/S/TRY_EXT_CTRLS: OK
		test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
		test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
		Standard Controls: 4 Private Controls: 10

	Format ioctls:
		test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
		test VIDIOC_G/S_PARM: OK (Not Supported)
		test VIDIOC_G_FBUF: OK (Not Supported)
		test VIDIOC_G_FMT: OK
		test VIDIOC_TRY_FMT: OK
		test VIDIOC_S_FMT: OK
		test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
		test Cropping: OK (Not Supported)
		test Composing: OK (Not Supported)
		test Scaling: OK (Not Supported)

	Codec ioctls:
		test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
		test VIDIOC_G_ENC_INDEX: OK (Not Supported)
		test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)

	Buffer ioctls:
		test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
		test VIDIOC_EXPBUF: OK

Test input 0:

Total: 42, Succeeded: 42, Failed: 0, Warnings: 0

[ 619.029622] tegra-i2c 7000d000.i2c: pio xfer timed out addr: 0x3c - it looks like my driver broke another i2c interface?

ShaneCCC, may i ask you to help?
Can you give some ideas what i should to do?

Please enable the debug log by below command, and use below v4l2-ctl command to get the log.

cd /sys/kernel/debug/dynamic_debug/
echo file csi2_fops.c +p > control

v4l2-ctl -d /dev/video0 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=3

Thanks ShaneCCC!

cd /sys/kernel/debug/dynamic_debug/
echo file csi2_fops.c +p > control
v4l2-ctl -d /dev/video0 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=3

control file placed here:

https://cloud.mail.ru/public/5FSC/hqXtKdqzE

What’s this control file? Please check if any VI/CSI status REG from dmesg.

control file from /sys/kernel/debug/dynamic_debug/

dmesg:

[30222.463916] video4linux video0: Syncpoint already enabled at capture done!0
[30222.628979] video4linux video0: MW_ACK_DONE syncpoint time out!0
[30222.635093] video4linux video0: TEGRA_VI_CSI_ERROR_STATUS 0x0000000d
[30222.642295] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000180
[30222.649130] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
[30222.654808] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000

From the log it show the short frame. Please make sure the resolution is correct.

CSI_CSI_PIXEL_PARSER_A_STATUS_0

7 PPA_SHORT_FRAME: Set when CSI-PPA receives a short frame. This bit gets set even if
CSI_PPA_PAD_FRAME specifies that short frames are to be padded to the correct line length.