P2R and R2P meaning

Accelerated Computing CUDA CUDA Programming and Performance
1

Hi all,
when I use cuobjdump to dump the sass code, I find some instructions just like:

P2R Rn, PR, Rm, imm; 
R2P PR, Rn, imm;

Both of Rn and Rm are general reg.

I don't know PR and the immediate number imm mean in the instruction. Does any one have ideas about what they mean? 

Thanks!
2

These are predicate to register and register to predicate moves.

You can find brief descriptions of SASS instructions in the documentation for cuobjdump/nvdisasm.

3

Thanks for your reply.
I know these two instructions are moves between predicate reg and general reg.
but I want to know some details about PR and the last immediate number meaning.

4

NVIDIA doesn’t publicly document machine instruction to that level of detail. Check Scott Grey’s maxas (SASS assembler for Maxwell), he spent much time reverse engineering the machine instructions. Or post some actual examples here in context and we might be able to figure it out.

As was recently discussed in these forums, there appear to be eight one-bit predicate registers, one of which is the predefined predicate “true”, which is displayed as PT in disassembly. If I recall correctly, PT occupies the encoding that would designate P7 otherwise. So P0 through P6 are available to programs.