PCIE DMA cache problem on TX2

Hi , I Implement a PCIE DMA based on TX2( Gen2 4x). Driver allocate 8 ring buffers use the dma_allocate_cohernet(), and use remap_pfn_range() to mmap the driver to userspace. FPGA send a 32bit counter to the DMA buffer, the application will read each buffer and check if the counter is right . After DMA system run , I find a strange issue. Some times in one ring buffer(eache is 2MByte), we found 64 byte data no flushed( means the 64 byte is the previous 64 byte ) by FPGA. Because our FPGA will send 128Byte in one TLP packet. so it is not reansonable lost only 64 byte. We use de devmem tool to check the 8 ring buffer , after stop the FPGA DMA, I found the 8 ring buffer data is OK, so do the dma_allocate_cohernet() function get a cached buffer ?
I try to use the pgprot_nocached(vma->vm_page_prot) to get a nocache mmap, but it do not work, and report BUS error (core dump) on the mmap function . Dose any one know the reason ?

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Hence we are closing this topic. If need further support, please open a new one.

Sorry for the late response, have you managed to get issue resolved or still need the support? Thanks

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