PCIe lane reversal on C0


We are designing our carrier board for agx-xavier. We would like to reverse PCIe lanes for C0 used for M.2 M key for SSD, in order to facilitate PCB layout. And we use PCIe in root-complex mode ONLY on Xavier side.

Original: UPHY2 → lane0, UPHY3 → lane1, UPHY4 → lane2, UPHY5 → lane3.
Reverse: UPHY5 → lane0, UPHY4 → lane1, UPHY3 → lane2, UPHY2 → lane3.

Please check my attached screenshot for detail.

  1. Is this PCIe lane reversal supported by PCIe controller on Xavier?
  2. Do I need any software change in Linux device-treee and/or Linux PCIe driver?
  3. Can I do the lane reversal on other multi-lane PCIe controllers: C4 and C5?
  4. Is this PCIe lane reversal independent on the PCIe endpoint/device that is connected with (work for any PCIe endpoint/device)?
  5. Instead of lane reversal, can I do any lane swap in random way within the PCIe controller group? For example, for my C0 case, can I do UPHY3 → lane0, and UPHY2 → lane1 (UPHY4 and PUHY5 unchanged.)? I think the answer is no, but I want to confirm on it.



Any update on this question? This is kind of urgent which is causing issue for our PCB layout.


Hi Nvidia,

I also want to confirm on PCIe Polarity Inversion is supported on Xavier. So, please confirm both “Lane Reversal” and “Polarity Inversion”.

I can find a similar post, but that is for NX. I want confirm on Xavier as well.


Lane reversal support for of AGX and NX is same.


Thanks for you reply.
Can you confirm on both “Lane Reversal” and “Polarity Inversion”? (not just lane reversal)


Yes, Xavier supports both.

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