PCIe Maximum Payload Size only 128bytes

[chip.lukes]

Hello,

We have a custom board with a Xavier NX + PCIe Switch + FPGA. The Jetson is the PCIe root. All endpoints are capable of >= 256 bytes and this can be confirmed through lspci as well as the switch configuration software.

I mostly do FPGA work, so I don’t work with embedded Linux much, but there must be some way of getting the Jetson to NOT limit all of the endpoints to 128byte TLPs.

I’ve tried a few kernel boot parameters such as pci=pcie_bus_safe, pci=pcie_bus_perf, etc. (set in /boot/extlinux/extlinux.conf), but I have yet to find anything that helps.

Any help would be greatly appreciated!

Thanks,
Chip

[sumin.lee]

You can download BSP source.

Jetson Linux R32.6.1 Release Page

Decompress public_sources.tbz2 and then kernel_src.tbz2

The PCI source code path as it
=> /Linux_for_Tegra/source/public/kernel/nvidia/drivers/pci/dwc/pcie-tegra.c

You can check MPS as follows :

Kernel Build Guide

[chip.lukes]

Hi Sumin,

I appreciate the help. It is useful to see where this is being set in the kernel code as we will eventually like to make this change there.

In the short term I have discovered it is possible to change this using setpci commands.

Thank you!

Chip

Thank you.