I have connected to the Jetson TX2 development kit a PCIe card with 4 serial RS-485 ports, based on chip EXAR XR17V354. The board is properly detected by the kernel as per lspci command: 01:00.0 Serial controller: Exar Corp. Device 0354 (rev 03) (prog-if 02 [16550]) Control: I/O- Mem+ BusMaster- …

Nvidia Tegra (till TX2) doesn’t support true DW (Double Word) unaligned accesses. It always sends a request for 4 bytes (i.e. DW aligned address) and then uses ‘byte enable’ concept to return only the data that CPU is really looking for. So, in this case, the 32-bit read is auto clearing the bits, …

PCIE spurious interrupts

Robotics & Edge Computing Jetson & Embedded Systems Jetson TX2

tessadriandrea March 26, 2020, 8:42am 10

Is there any feedback about if it is possibile to read PCIe at 8, 16 and 32 bits ?
I suppose this is the main issue.

PCIe unalined access in JetsonNano

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PCIE spurious interrupts

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