Hi, community!
I started to use Aerial Container 24-3 version and used testVectors generated inside Aerial container 24-2.1 version. Do I need to regenerate testVectors for the new container version ?
I got errors below while running testMAC.
root@mmm-6GTB-ARS:/opt/nvidia/cuBB# sudo /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac F08 12C 59
Started test_mac on CPU core 71
Started test_mac on CPU core 71 at: 02:04:56.131676
AERIAL_LOG_PATH unset
Using default log path
Log file set to /tmp/testmac.log
02:04:56.131696 WRN 159 0 [MAC.PROC] test_mac_signal_setup: register signal handler
02:04:56.132557 WRN 159 0 [MAC] test_mac_yaml=/opt/nvidia/cuBB/cuPHY-CP/testMAC/testMAC/test_mac_config.yaml
02:04:56.132892 WRN 159 0 [MAC] low_priority_core=19
02:04:56.133313 WRN 159 0 [NVLOG.CPP] Using /opt/nvidia/cuBB/cuPHY/nvlog/config/nvlog_config.yaml for nvlog configuration
02:04:56.133330 WRN 159 0 [NVLOG.CPP] Output log file path /tmp/testmac.log
02:04:56.133594 WRN 159 0 [MAC] Thread main initialized fmtlog
02:04:56.133600 WRN 159 0 [MAC] Run /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac launch_pattern_F08_12C_59.yaml
02:04:56.133602 WRN 159 0 [MAC] Enabled channels: PUSCH PDSCH PDCCH_UL PDCCH_DL PBCH PUCCH PRACH CSI_RS SRS BFW_DL BFW_UL | channel_mask=0x7FF
02:04:56.133612 WRN 159 0 [MAC.CFG] Read YAML: test_slots=0 max_msg_size=8192 max_data_size=576000 pdsch_align_bytes=1
02:04:56.133621 WRN 159 0 [MAC.CFG] test_cell_update: size=0 period=0
02:04:56.135942 WRN 159 0 [MAC.LP] launch_pattern_parsing: config_list=12 cell_mask=0 cell_num=12 lp_cell_id.size=12
02:04:56.135945 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30e042b0
02:04:56.137895 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=0 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.144495 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30e07930
02:04:56.146151 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=1 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.153183 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30e0d1b0
02:04:56.154707 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=2 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.161675 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30e3efc0
02:04:56.163243 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=3 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.170199 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30e95960
02:04:56.171695 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=4 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.178705 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30ebf480
02:04:56.180204 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=5 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.187173 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30e97440
02:04:56.188662 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=6 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.195629 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30ebc050
02:04:56.197111 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=7 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.204076 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30ebf440
02:04:56.205562 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=8 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.212515 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30ec4300
02:04:56.214010 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=9 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.220950 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30ebe3f0
02:04:56.222429 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=10 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.229351 WRN 159 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x30d19490
02:04:56.230844 WRN 159 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=11 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:04:56.238024 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=0 phyCellId=41
02:04:56.238024 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=1 phyCellId=42
02:04:56.238024 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=2 phyCellId=43
02:04:56.238024 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=3 phyCellId=44
02:04:56.238024 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=4 phyCellId=45
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=5 phyCellId=46
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=6 phyCellId=47
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=7 phyCellId=48
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=8 phyCellId=49
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=9 phyCellId=50
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=10 phyCellId=51
02:04:56.238025 WRN 159 0 [MAC.LP] launch_pattern_parsing: Updated phyCellId: cell_id=11 phyCellId=52
02:04:56.238876 WRN 161 0 [MAC.LP] Thread parsing_thread_func on CPU 19 initialized fmtlog
02:04:56.238912 WRN 161 0 [MAC.LP] parsing_thread_func: thread 00 started on CPU core 21
02:04:56.267148 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 00/80
02:04:56.294317 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 01 slot 00/80
02:04:56.321339 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 02 slot 00/80
02:04:56.348101 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 03 slot 00/80
02:04:56.375207 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 04 slot 00/80
02:04:56.401984 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 05 slot 00/80
02:04:56.428742 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 06 slot 00/80
02:04:56.455484 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 07 slot 00/80
02:04:56.482414 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 08 slot 00/80
02:04:56.509205 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 09 slot 00/80
02:04:56.536115 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 10 slot 00/80
02:04:56.562990 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 11 slot 00/80
02:04:56.589825 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 01/80
02:04:56.616757 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 01 slot 01/80
02:04:56.643541 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 02 slot 01/80
02:04:56.670427 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 03 slot 01/80
02:04:56.697158 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 04 slot 01/80
02:04:56.724191 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 05 slot 01/80
02:04:56.751440 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 06 slot 01/80
02:04:56.778271 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 07 slot 01/80
02:04:56.805043 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 08 slot 01/80
02:04:56.832198 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 09 slot 01/80
02:04:56.859057 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 10 slot 01/80
02:04:56.885891 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 11 slot 01/80
02:04:56.912663 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 02/80
02:04:56.939555 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 01 slot 02/80
02:04:56.966408 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 02 slot 02/80
02:04:56.993323 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 03 slot 02/80
02:04:57.020458 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 04 slot 02/80
02:04:57.047333 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 05 slot 02/80
02:04:57.074013 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 06 slot 02/80
02:04:57.100964 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 07 slot 02/80
02:04:57.127791 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 08 slot 02/80
02:04:57.154556 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 09 slot 02/80
02:04:57.181358 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 10 slot 02/80
02:04:57.208190 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 11 slot 02/80
02:04:57.216120 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 03/80
02:04:57.223950 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 01 slot 03/80
02:04:57.232778 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 02 slot 03/80
02:04:57.245665 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 03 slot 03/80
02:04:57.327112 FATAL exit: Thread [lp_parse_00] on core 21 file /opt/nvidia/cuBB/cuPHY-CP/testMAC/testMAC/launch_pattern.cpp line 1933: additional info: TV cell {} slot {} {} {} exception: {}
02:04:57.258130 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 04 slot 03/80
02:04:57.266918 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 05 slot 03/80
02:04:57.274984 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 06 slot 03/80
02:04:57.283275 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 07 slot 03/80
02:04:57.291103 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 08 slot 03/80
02:04:57.299302 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 09 slot 03/80
02:04:57.307130 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 10 slot 03/80
02:04:57.314949 WRN 161 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 11 slot 03/80
02:04:57.322576 WRN 161 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key nCsi2Reports not exist
02:04:57.322593 WRN 161 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_prmOffsets not exist
02:04:57.322609 WRN 161 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_prmSizes not exist
02:04:57.322625 WRN 161 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_csi2MapIdx not exist
02:04:57.322641 WRN 161 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_nPart1Prms not exist
02:04:57.327099 ERR 161 0 [AERIAL_INVALID_PARAM_EVENT] [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 exception: Index not found for member name 'RSSI_ehq'
02:04:57.327132 ERR 161 0 [AERIAL_SYSTEM_API_EVENT] [NVLOG.EXIT_HANDLER] FATAL exit: Thread [lp_parse_00] on core 21 file /opt/nvidia/cuBB/cuPHY-CP/testMAC/testMAC/launch_pattern.cpp line 1933: additional info: TV cell {} slot {} {} {} exception: {}
root@SKT-6GTB-ARS:/opt/nvidia/cuBB# vi /opt/nvidia/cuBB/cuPHY-CP/cuphycontroller/config/cuphycontroller_F08_CG1_skt.yaml
root@SKT-6GTB-ARS:/opt/nvidia/cuBB# sudo /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac F08 1C 59
Started test_mac on CPU core 71
Started test_mac on CPU core 71 at: 02:06:23.101426
AERIAL_LOG_PATH unset
Using default log path
Log file set to /tmp/testmac.log
02:06:23.101446 WRN 165 0 [MAC.PROC] test_mac_signal_setup: register signal handler
02:06:23.102318 WRN 165 0 [MAC] test_mac_yaml=/opt/nvidia/cuBB/cuPHY-CP/testMAC/testMAC/test_mac_config.yaml
02:06:23.102538 WRN 165 0 [MAC] low_priority_core=19
02:06:23.102748 WRN 165 0 [NVLOG.CPP] Using /opt/nvidia/cuBB/cuPHY/nvlog/config/nvlog_config.yaml for nvlog configuration
02:06:23.102763 WRN 165 0 [NVLOG.CPP] Output log file path /tmp/testmac.log
02:06:23.103029 WRN 165 0 [MAC] Thread main initialized fmtlog
02:06:23.103035 WRN 165 0 [MAC] Run /opt/nvidia/cuBB/build/cuPHY-CP/testMAC/testMAC/test_mac launch_pattern_F08_1C_59.yaml
02:06:23.103037 WRN 165 0 [MAC] Enabled channels: PUSCH PDSCH PDCCH_UL PDCCH_DL PBCH PUCCH PRACH CSI_RS SRS BFW_DL BFW_UL | channel_mask=0x7FF
02:06:23.103047 WRN 165 0 [MAC.CFG] Read YAML: test_slots=0 max_msg_size=8192 max_data_size=576000 pdsch_align_bytes=1
02:06:23.103058 WRN 165 0 [MAC.CFG] test_cell_update: size=0 period=0
02:06:23.103377 WRN 165 0 [MAC.LP] launch_pattern_parsing: config_list=1 cell_mask=0 cell_num=1 lp_cell_id.size=1
02:06:23.103379 WRN 165 0 [MAC.LP] config params TVnr_DLMIX_7072_gNB_FAPI_s0.h5 0x3e1efb40
02:06:23.105248 WRN 165 0 [MAC.LP] load_h5_config_params: loaded 'Cell_Config': cell_id=0 phyCellId=41 numTxAnt=4 numTxPort=4 numRxAnt=4 numRxPort=4 BFP=14 h5file=TVnr_DLMIX_7072_gNB_FAPI_s0.h5
02:06:23.112811 WRN 167 0 [MAC.LP] Thread parsing_thread_func on CPU 19 initialized fmtlog
02:06:23.112858 WRN 167 0 [MAC.LP] parsing_thread_func: thread 00 started on CPU core 21
02:06:23.140659 WRN 167 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 00/80
02:06:23.167503 WRN 167 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 01/80
02:06:23.194308 WRN 167 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 02/80
02:06:23.202080 WRN 167 0 [MAC.LP] parsing_thread_func: thread [0] parsed TVs for cell 00 slot 03/80
02:06:23.209616 WRN 167 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key nCsi2Reports not exist
02:06:23.209635 WRN 167 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_prmOffsets not exist
02:06:23.209652 WRN 167 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_prmSizes not exist
02:06:23.209668 WRN 167 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_csi2MapIdx not exist
02:06:23.209683 WRN 167 0 [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 key calcCsi2Size_nPart1Prms not exist
02:06:23.214134 FATAL exit: Thread [lp_parse_00] on core 21 file /opt/nvidia/cuBB/cuPHY-CP/testMAC/testMAC/launch_pattern.cpp line 1933: additional info: TV cell {} slot {} {} {} exception: {}
02:06:23.214123 ERR 167 0 [AERIAL_INVALID_PARAM_EVENT] [MAC.LP] TV cell 0 slot 4 PUSCH TVnr_ULMIX_3040_gNB_FAPI_s0.h5 exception: Index not found for member name 'RSSI_ehq'
02:06:23.214148 ERR 167 0 [AERIAL_SYSTEM_API_EVENT] [NVLOG.EXIT_HANDLER] FATAL exit: T