Hi,
I’m trying to enable another RTL8111H-CG on Orin NX with our custom carrier board.
The RTL8111h-CG is connected to PCIe1@14100000 (C1).
I see the devicetree is alreadly enabled:
pcie@14100000 {
status = “okay”;
vddio-pex-ctl-supply = <&vdd_1v8_ao>;
phys = <&p2u_hsio_3>;
phy-names = “p2u-0”;
};
The ODMDATA setting is default:
ODMDATA=“gbe-uphy-config-8,hsstp-lane-map-3,hsio-uphy-config-0”;
$ lspci
0004:00:00.0 PCI bridge: NVIDIA Corporation Device 229c (rev a1)
0004:01:00.0 Non-Volatile memory controller: Innodisk Corporation PCIe 3TE6 Controller )
0008:00:00.0 PCI bridge: NVIDIA Corporation Device 229c (rev a1)
0008:01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI)
It always shows “phy link never came up” after boot:
[ 5.242076] tegra194-pcie 14100000.pcie: Adding to iommu group 3
[ 5.243887] tegra194-pcie 14100000.pcie: host bridge /bus@0/pcie@14100000 ranges:
[ 5.243907] tegra194-pcie 14100000.pcie: MEM 0x2080000000…0x20a7ffffff → 0x2080000000
[ 5.243914] tegra194-pcie 14100000.pcie: MEM 0x20a8000000…0x20afffffff → 0x0040000000
[ 5.243917] tegra194-pcie 14100000.pcie: IO 0x0030100000…0x00301fffff → 0x0030100000
[ 5.244230] tegra194-pcie 14100000.pcie: iATU unroll: enabled
[ 5.244232] tegra194-pcie 14100000.pcie: Detected iATU regions: 8 outbound, 2 inbound
[ 6.343340] tegra194-pcie 14100000.pcie: Phy link never came up
[ 7.344491] tegra194-pcie 14100000.pcie: Phy link never came up
[ 7.344599] tegra194-pcie 14100000.pcie: PCI host bridge to bus 0001:00
Could you help check this issue?
Here is the uart log.
rtl8111-fail.txt (76.3 KB)
Yes, C1 is already enabled by default software. If the card is not able to get detected, please review the hardware design.
I tried to add the patch of " Debug PCIe Link-Up Failure" in drivers/pci/controller/dwc/pcie-tegra194.c:
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index a44b477cee27…937d7019fbb1 100644
— a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -2193,10 +2193,12 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
pcie->link_state = tegra_pcie_dw_link_up(&pcie->pci);
if (!pcie->link_state) {
-
ret = -ENOMEDIUM;
-
goto fail_host_init;
-
dev_err(dev, "Disabling PCIe power down\n");
-
ret = 0;
}
-
pcie->link_state = true;
-
name = devm_kasprintf(dev, GFP_KERNEL, “%pOFP”, dev->of_node);
if (!name) {
ret = -ENOMEM;
but why it didn’t show that pci_bridge in “lspci”?
first, please do not copy and paste a patch unless you know how to make the format readable. Looks like you cannot.
second, how did you update the driver after you applied that patch?
I used the step in " Building the Jetson Linux Kernel":
$ export CROSS_COMPILE=<toolchain-path>/bin/aarch64-buildroot-linux-gnu-
$ make -C kernel
$ export INSTALL_MOD_PATH=<install-path>/Linux_for_Tegra/rootfs/
$ sudo -E make install -C kernel
$ cp kernel/kernel-jammy-src/arch/arm64/boot/Image <install-path>/Linux_for_Tegra/kernel/Image
and then flashed the board:
$ sudo ./tools/kernel_flash/l4t_initrd_flash.sh --external-device nvme0n1p1 \
-c tools/kernel_flash/flash_l4t_t234_nvme.xml -p “-c bootloader/generic/cfg/flash_t234_qspi.xml” \
–showlogs --network usb0 jetson-orin-nano-devkit internal
PCIe driver is pre-loaded in initrd. So you have to update the pcie driver in initrd too.
->To update the initramfs, run the following commands:
Thanks very much for your support, this issue is caused by SMT.