ORIN NX 16G(jetpack 5.1.1) tegra194-pcie 140c0000.pcie: Phy link never came up

While using PCIe C9, the following error occurred. Can you tell me the reason?
0125-com30.log (113.5 KB)

I did some things to configure the PCIe’s C9.

Step one:
modify the file p3767.conf.common
ODMDATA=“gbe-uphy-config-9,hsstp-lane-map-3,hsio-uphy-config-0”;

Step two:
add to device-tree
pcie@141e0000 { /* C7x1 node */
status = “okay”;
phys = <&p2u_gbe_0>;
phy-names = “p2u-0”;
};

pcie@140c0000 { /* C9x1 */
status = “okay”;
phys = <&p2u_gbe_1>;
phy-names = “p2u-0”;
};

cat ./pcie@140c0000/status

the value is okay, so I believe the device tree modification has taken effect.

step three:

I have modified the four pins related to PEX9 and generated three device tree files.replace it with the following document.
tegra234-mb1-bct-pinmux-p3767-hdmi-a03.dtsi
tegra234-mb1-bct-padvoltage-p3767-hdmi-a03.dtsi

step four:
After the overall compilation, replace the generated arch//dts/nvid replace the generated arch/arm64/boot/dts/nvidia/* with Linux_for_Tegra/kernel/dtb/*

If below patch is present, then it may not be software issue. Pinmux does not need update either.

diff -bu5rp build/origin/driver/p3767.conf.common source/modify/driver/p3767.conf.common
--- build/origin/driver/p3767.conf.common       2022-11-13 02:03:55.066816082 -0500
+++ source/modify/driver/p3767.conf.common      2023-01-13 00:29:07.038331805 -0500
@@ -106,17 +106,17 @@ process_fuse_level()
        sub_var_token "NVENCRYPTKEY_FILE" "${srctoken}" "${trgtoken}";
 }

 # Common values and/or defaults across P3767:

-ODMDATA="gbe-uphy-config-8,hsstp-lane-map-3,hsio-uphy-config-0";
+ODMDATA="gbe-uphy-config-9,hsstp-lane-map-3,hsio-uphy-config-0";
 CHIPID=0x23;
 ITS_FILE=;
 OVERLAY_DTB_FILE=;
 CMDLINE_ADD="mminit_loglevel=4 console=ttyTCU0,115200 console=ttyAMA0,115200 firmware_class.path=/etc/firmware fbcon=map:0 net.ifnames=0"
 target_board="t186ref";
 ROOT_DEV="mmcblk0p1 ------------ internal eMMC.
         sda1 ----------------- external USB devices. (USB memory stick, HDD)
         eth0 ----------------- nfsroot via RJ45 Ethernet port.
         eth1 ----------------- nfsroot via USB Ethernet interface.";
 TEGRABOOT="bootloader/mb2_t234.bin";


diff -bu5rp build/origin/kernel/hardware/nvidia/platform/t23x/arvala/kernel-dts/cvb/tegra234-p3768-0000-a0-pcie.dtsi source/modify/kernel/hardware/nvidia/platform/t23x/arvala/kernel-dts/cvb/tegra234-p3768-0000-a0-pcie.dtsi
--- build/origin/kernel/hardware/nvidia/platform/t23x/arvala/kernel-dts/cvb/tegra234-p3768-0000-a0-pcie.dtsi    2022-11-13 01:16:20.000000000 -0500
+++ source/modify/kernel/hardware/nvidia/platform/t23x/arvala/kernel-dts/cvb/tegra234-p3768-0000-a0-pcie.dtsi   2023-01-13 00:40:21.569805920 -0500
@@ -32,12 +32,18 @@
                 * below:
                 * C7 x2 - default
                 * C7 x1 or C9 x1
                 */
                status = "okay";
-               phys = <&p2u_gbe_0>, <&p2u_gbe_1>;
-               phy-names = "p2u-0", "p2u-1";
+               phys = <&p2u_gbe_0>;
+               phy-names = "p2u-0";
+       };
+
+       pcie@140c0000 {
+               status = "okay";
+               phys = <&p2u_gbe_1>;
+               phy-names = "p2u-0";
        };

        pcie@140a0000 {/* C8 - Ethernet */
                status = "okay";