Hello
We are bringing up a custom carrier board for Xavier module. On our board we are using SGTL5000 audio codec. SGTL5000 need MCLK input from module to respond on I2C. I think on Xavier evaluation module, it happens other way around. First the I2C is probed and upon getting device response, clock in enabled. How do we enable clock always so that SGTL5000 can respond to I2C probe ?
Thanks,
Don
Hi Don,
When the SGTL5000 codec is registered as an I2C device by calling sgtl5000_i2c_probe(), it is this function that will in turn call devm_clk_get() to request the codec MCLK and enable the codec MCLK by calling clk_prepare_enable(). So the SGTL5000 codec driver will handle this. The clock that the SGTL5000 codec request is dependent upon what is specified as the clock by the ‘clocks’ property for the SGTL5000 codec in device-tree. For example, see the SGTL5000 codec binding doc [0]. What do you have in device-tree for the codec ‘clocks’ property?
Regards,
Jon
Hello Jon,
Thanks for the reply.
Please find attached patch file.
Are you able to see any obvious mistakes ?
Thanks,
Don.
diff --git a/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi b/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi
index b936b70..c597aa8 100644
--- a/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi
+++ b/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi
@@ -33,16 +33,18 @@
};
i2c@c250000 {
- rt5658: rt5659.7-001a@1a {
- compatible = "realtek,rt5658";
- reg = <0x1a>;
-
+ sgtl5000: sgtl5000.7-000a@0a {
+ compatible = "fsl,sgtl5000";
+ reg = <0x0a>;
+ clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
+ clock-names = "extern1";
+ /*
realtek,jd-src = <RT5659_JD_NULL>;
realtek,dmic1-data-pin = <RT5659_DMIC1_NULL>;
realtek,dmic2-data-pin = <RT5659_DMIC2_DATA_IN2P>;
gpios = <&tegra_main_gpio TEGRA194_MAIN_GPIO(S, 5) 0>;
-
+ */
status = "okay";
};
};
@@ -76,10 +78,10 @@
<&bpmp_clks TEGRA194_CLK_PLLA>,
<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
<&bpmp_clks TEGRA194_CLK_AHUB>,
- <&bpmp_clks TEGRA194_CLK_CLK_M>,
- <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
+ <&bpmp_clks TEGRA194_CLK_CLK_M>;
+
clock-names = "pll_p_out1", "pll_a", "pll_a_out0", "ahub",
- "clk_m", "extern1";
+ "clk_m";
nvidia,audio-routing =
"x Headphone Jack", "x HPO L Playback",
@@ -115,9 +117,9 @@
/* Override with Codec entries */
nvidia,dai-link-1 {
- link-name = "rt565x-playback";
- codec-dai = <&rt5658>;
- codec-dai-name = "rt5659-aif1";
+ link-name = "sgtl5000-playback";
+ codec-dai = <&sgtl5000>;
+ codec-dai-name = "sgtl5000";
};
/* Override with BT SCO entries */
diff --git a/kernel/kernel-4.9/arch/arm64/configs/tegra_ar1335_defconfig b/kernel/kernel-4.9/arch/arm64/configs/tegra_ar1335_defconfig
index 0fe686f..dd1c6f9 100644
--- a/kernel/kernel-4.9/arch/arm64/configs/tegra_ar1335_defconfig
+++ b/kernel/kernel-4.9/arch/arm64/configs/tegra_ar1335_defconfig
@@ -641,6 +641,7 @@ CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_TAS2552=y
CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_SOC_SGTL5000=y
CONFIG_SND_SOC_TEGRA_T186REF_P4573_ALT=y
CONFIG_SND_SOC_TEGRA_T186REF_M3420_ALT=y
CONFIG_SND_SOC_TEGRA_ALT=y
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Hello Don,
The part under the ‘sgtl5000.7-000a@0a’ node looks correct to me and yes that’s what I would expect. However, you should not need to remove the AUD_MCLK from under the sound node and in fact I recommend that you do not do this. The reason being is that we want AUD_MCLK to be configured by the Tegra ASoC machine driver to operate at something like 256fs by default (I see the SGTL5000 driver supports a MCLK of 256fs, 384fs and 512fs).
However, to configure the MCLK for 256*fs it will require an update to the Tegra ASoC machine driver. Assuming that you are using L4T rel32.1 it would be something like …
diff --git a/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c b/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
index cbe8c5ff3c6a..a8bb56e93f7f 100644
--- a/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
+++ b/sound/soc/tegra-alt/machine_drivers/tegra_machine_driver_mobile.c
@@ -651,6 +651,23 @@ static int tegra_machine_dai_init(struct snd_soc_pcm_runtime *runtime,
dai_params->formats = formats;
}
+ rtd = snd_soc_get_pcm_runtime(card, "sgtl5000-playback");
+ if (rtd) {
+ dai_params =
+ (struct snd_soc_pcm_stream *)rtd->dai_link->params;
+
+ dai_params->rate_min = clk_rate;
+ dai_params->channels_min = channels;
+ dai_params->formats = formats;
+
+ err = snd_soc_dai_set_sysclk(rtd->codec_dai, RT5659_SCLK_S_MCLK,
+ clk_out_rate, SND_SOC_CLOCK_IN);
+ if (err < 0) {
+ dev_err(card->dev, "codec_dai clock not set\n");
+ return err;
+ }
+ }
+
return 0;
}
@@ -793,6 +810,21 @@ static int tegra_machine_compr_set_params(struct snd_compr_stream *cstream)
}
#endif
+static int tegra_machine_sgtl5000_init(struct snd_soc_pcm_runtime *rtd)
+{
+ struct tegra_machine *machine = snd_soc_card_get_drvdata(rtd->card);
+ int err;
+
+ err = tegra_alt_asoc_utils_set_extern_parent(&machine->audio_clock,
+ "pll_a_out0");
+ if (err < 0) {
+ dev_err(rtd->card->dev, "Failed to set extern clk parent\n");
+ return err;
+ }
+
+ return 0;
+}
+
static int tegra_machine_fepi_init(struct snd_soc_pcm_runtime *rtd)
{
struct device *dev = rtd->card->dev;
@@ -922,6 +954,10 @@ static void dai_link_setup(struct platform_device *pdev)
"fe-pi-audio-z-v2")) {
tegra_machine_codec_links[i].init =
tegra_machine_fepi_init;
+ } else if (strstr(tegra_machine_codec_links[i].name,
+ "sgtl5000-playback")) {
+ tegra_machine_codec_links[i].init =
+ tegra_machine_sgtl5000_init;
}
}
}
Even though the above change is needed, this will not resolve the initial issue that you have reported. I assume that the issue that you initially reported still persists with the device-tree changes that you have made so far? If so, then one problem could be that the parent clock for the AUD_MCLK is not configured when the it is enabled by the SGTL5000 codec. We test with an RT5658 codec on the Jetson AGX Xavier DevKit which should work in the same way. Do you see an error on boot that is causing the probe of the SGTL5000 codec to fail?
Also it will be necessary to update the nvidia,audio-routing in device-tree to be something like …
diff --git a/common/tegra194-audio-p2822-0000.dtsi b/common/tegra194-audio-p2822-0000.dtsi
index 2708dd993bcf..f183b9353b47 100644
--- a/common/tegra194-audio-p2822-0000.dtsi
+++ b/common/tegra194-audio-p2822-0000.dtsi
@@ -75,15 +75,8 @@
"clk_m", "extern1";
nvidia,audio-routing =
- "x Headphone Jack", "x HPO L Playback",
- "x Headphone Jack", "x HPO R Playback",
- "x IN1P", "x Mic Jack",
- "x IN2P", "x Mic Jack",
- "x Int Spk", "x SPO Playback",
- "x DMIC L1", "x Int Mic",
- "x DMIC L2", "x Int Mic",
- "x DMIC R1", "x Int Mic",
- "x DMIC R2", "x Int Mic",
+ "x Headphone", "x HP_OUT",
+ "x MIC_IN", "x Mic",
"y Headphone", "y OUT",
"y IN", "y Mic",
"z Headphone", "z OUT",
Regards,
Jon
Hello Jon,
Thanks for the help. This worked fine. We also need to support one line-in apart from Mic, connected to Line in of SGTL5000. I see Xavier eval board doesn’t have any line in. I don’t see that in routing table either.
"x Headphone Jack", "x HPO L Playback",
"x Headphone Jack", "x HPO R Playback",
"x IN1P", "x Mic Jack",
"x IN2P", "x Mic Jack",
"x Int Spk", "x SPO Playback",
"x DMIC L1", "x Int Mic",
"x DMIC L2", "x Int Mic",
"x DMIC R1", "x Int Mic",
"x DMIC R2", "x Int Mic",
"y Headphone", "y OUT",
"y IN", "y Mic",
"z Headphone", "z OUT",
I tried adding this as an Internal MIC as this :
“x LINE_IN”, “x Int Mic”, But that doesn’t work . Any idea how to add this ?
Thanks,
Don.
Have you sloved this peoblem?
I face the same problem
Thinks