Spi pin multiplexing

The Module Pin Name of E3 and E4 is SPI0, but in the “tegra186-soc-spi.dtsi” file, it is the following expression:

aliases {
    spi0 = &spi0;

In the file “Jetson-TX2-Series-Pinmux-Template_v1.08”, the function of spi0 is spi2

where is the problem?

Thank you!!

Have SFIO like SPI2_xxx aka SPI2 minus 1 to map to software bus number.
Here the SPI2_SCK is the spi1

Can you explain in more detail? I don’t understand very well, and where can I see the mapping rules

Just need to check the SFIO column for the real pin out from SOC chip for the HW function name like row a02 the SFIO pin name is SPI2_SCK that tell it’s the pin for SPI2 controller. However it’s HW name need to minus 1 for software function so get the SPI1.
Due to HW name is start from 1 and software name is from 0

My understanding is:
first, the pin mapping relationship is shown in the following table:
second, in the above table, the “Software function” column represents the left value of the node aliases in the “tegra186-soc-spi.dtsi” file, and the right value is the renaming of the left value;

Is my understanding correct?

There is another problem, the design manual shows that there are three spi interfaces, but there are 6 spi definitions (spi0/spi1/spi2/spi3/spi4/spi6) in “tegra186-soc-spi.dtsi”, and there are three extra What does (spi2/spi4/spi6) do?

  1. Yes, that’s correct.
  2. The chip have 6 spi controller but didn’t pin out all of them.

Got it, thank you!!

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