Tx2i -Usb0 of customized carrier board cannot work normally, and OTG cannot be used normally

[1480509296]

After you boot up the device and connect it to your host, will the host detect the jetson?-----》yes, I can use that usb0 normally.

I also found a phenomenon: when I burn the platform for the first time, it is good to start connecting to the target platform for the first time; The target platform can be regarded as a slave device, which can be configured and initialized through the computer terminal. However, after the slave initialization is completed, when the target platform is regarded as the master device, the usb0 port has no response.

but, I’m not sure this USB is in host mode. Its 5V power supply is provided by regulators: regulator@4 support? The software is set normally, but it has no effect, so is there any modification to the power control in the kernel?
The information is as follows：
lrwxrwxrwx 1 root root 0 Jan 28 2018 regulator.18 → …/…/devices/fixed-regulators/fixed-regulators:regulator@4/regulator/regulator.18
lrwxrwxrwx 1 root root 0 Jan 28 2018 regulator.19 → …/…/devices/fixed-regulators/fixed-regulators:regulator@5/regulator/regulator.19

/sys/class/regulator/regulator.19# echo enable > state
[ 689.527220] tegra-xusb 3530000.xhci: port 1 over-current detected
root@ubuntu:/sys/class/regulator/regulator.19# echo disable > state
root@ubuntu:/sys/class/regulator/regulator.19# echo enable > state
The kernel information is as follows:
[ 6.990218] tegra-xusb 3530000.xhci: entering ELPG
[ 6.993503] tegra-xusb 3530000.xhci: entering ELPG done
[ 689.527220] tegra-xusb 3530000.xhci: port 1 over-current detected
[ 689.533537] tegra-xusb 3530000.xhci: exiting ELPG
[ 689.533651] tegra-xusb-padctl 3520000.xusb_padctl: tegra186_phy_xusb_handle_overcurrent: clear port 1 pin 1 OC
[ 690.093636] tegra-xusb 3530000.xhci: Firmware timestamp: 2019-07-08 19:32:42 UTC, Version: 55.15 release
[ 690.094905] tegra-xusb 3530000.xhci: exiting ELPG done
[ 693.430681] usb usb2: usb_suspend_both: status 0
[ 693.430723] tegra-xusb 3530000.xhci: entering ELPG
[ 693.435544] tegra-xusb 3530000.xhci: entering ELPG done

[WayneWWW]

Hi,

Could you use some basic tool like usb mouse or keyboard to validate this issue?

[1480509296]

Hello, I used the USB mouse to verify it in time. The phenomenon is that the mouse insertion is unresponsive, and the power indicator of the mouse is not on.；the kernel has no information output。

[WayneWWW]

Could you share what you’ve modified in the device tree so far? Compared to the original device tree.

[1480509296]

I’m only in the software version: jetpack_ 4.3_ Linux_ JETSON_ TX2I (32.3.1）

kernel:4.9.140-tegra

Modify file:
tegra186-quill-power-tree-p3489-1000-a00-00. dtsi
-vbus-2-supply = <&vdd_ usb2_ 5v>;
+vbus-2-supply = <&battery_ reg>;/* modify by */

tegra186-quill-p3489-1000-a00-00-base. Modify in DTS file
usb2-2 {

status = “okay”;

mode = “host”;
-vbus-supply = <&vdd_ usb2_ 5v>;
+vbus-supply = <&battery_ reg>;/* modify by */

};

ou can also refer to the modification I posted yesterday.

[WayneWWW]

Your problem is on usb0 and so far you only modify usb2?

[1480509296]

Yes, originally, the slave mode of usb0 cannot be used, but after modifying USB2, the slave mode of usb0 can be used unexpectedly. I’m also surprised why I modified USB2, and the magic is that the slave mode of usb0 can be used, but the master mode can’t be used? What related parameters need to be modified? There is no power 3221 monitoring on our board, and the pins of other chips are the same as those of the reference, so we need your advice on how to modify them. Thank you

[WayneWWW]

Hi,

Maybe Something goes wrong with the board design. You should check the schematic with the Design guide document first.

And I don’t think this issue would be resolved by how you describe your problem in current way.

[1480509296]

Hello, WayneWWW，I intercepted some schematic diagrams of usb0 through the hardware engineer. My knowledge is not enough to judge that there is a problem with the hardware design,
Please refer to the hardware principle picture I sent. I urgently need your guidance and suggestions. Thank you.

[1480509296]

Hello, can you give relevant feedback? I also found that after my board started, in:

I don’t see Tegra-OTG in sys / devices / platform /
Does the existence of this directory file mark the normal startup of OTG function?

[kayccc]

Please have HW engineer to review the schematic with the Design guide document if all compliance first. Thanks