TX2 usb2.0 not working,how to fix it

yupw24 · January 7, 2020, 4:47am

hi,
I have a problem regarding USB2.0 on my tx2 custom base board.

The usb 2.0 don’t work,the usb2.0 power is not open.

The boot display is as follows：
tegra-i2c 3160000.i2c:pio timed out addr:0x74 tlen:28 rlen:4
tegra-i2c 3160000.i2c:— registe dump for debugging —
tegra-i2c 3160000.i2c:I2C_CNFG - 0x22c00
tegra-i2c 3160000.i2c:I2C_PACKET_TRANSFER_STATUS - 0x10001
tegra-i2c 3160000.i2c:I2C_FIFO_CONTROL - 0xe0
tegra-i2c 3160000.i2c:I2C_FIFO_STATUS - 0x800040
tegra-i2c 3160000.i2c:I2C_INT_MASK - 0x7d
tegra-i2c 3160000.i2c:I2C_INT_STATUS - 0x0
tegra-i2c 3160000.i2c:i2c transfer timed out addr:0x74
pca953x 0-0074:failed reading register
tegra-i2c 3160000.i2c:pio timed out addr:0x77 tlen:28 rlen:4
tegra-i2c 3160000.i2c:— registe dump for debugging —
tegra-i2c 3160000.i2c:I2C_CNFG - 0x22c00
tegra-i2c 3160000.i2c:I2C_PACKET_TRANSFER_STATUS - 0x10001
tegra-i2c 3160000.i2c:I2C_FIFO_CONTROL - 0xe0
tegra-i2c 3160000.i2c:I2C_FIFO_STATUS - 0x800040
tegra-i2c 3160000.i2c:I2C_INT_MASK - 0x7d
tegra-i2c 3160000.i2c:I2C_INT_STATUS - 0x0
tegra-i2c 3160000.i2c:i2c transfer timed out addr 0x77
pca953x 0-0077:failed reading register
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegradc 15210000.nvdisplay:dc_hdmi_hotplug_init:couldn’t get regulator vdd_hdmi_5v0,-517
FAN:couldn’t get regulator
tegra-i2c 3160000.i2c:pio timed out addr:0x40 tlen:16 rlen:0
tegra-i2c 3160000.i2c:— registe dump for debugging —
tegra-i2c 3160000.i2c:I2C_CNFG - 0x22c00
tegra-i2c 3160000.i2c:I2C_PACKET_TRANSFER_STATUS - 0x10001
tegra-i2c 3160000.i2c:I2C_FIFO_CONTROL - 0xe0
tegra-i2c 3160000.i2c:I2C_FIFO_STATUS - 0x800070
tegra-i2c 3160000.i2c:I2C_INT_MASK - 0x7c
tegra-i2c 3160000.i2c:I2C_INT_STATUS - 0x0
tegra-i2c 3160000.i2c:i2c transfer timed out addr 0x41
ina3221x 0-0040:ina3221x reset failure status:0xffffff92
tegra-i2c 3160000.i2c:pio timed out addr:0x41 tlen:16 rlen:0
tegra-i2c 3160000.i2c:— registe dump for debugging —
tegra-i2c 3160000.i2c:I2C_CNFG - 0x22c00
tegra-i2c 3160000.i2c:I2C_PACKET_TRANSFER_STATUS - 0x10001
tegra-i2c 3160000.i2c:I2C_FIFO_CONTROL - 0xe0
tegra-i2c 3160000.i2c:I2C_FIFO_STATUS - 0x800070
tegra-i2c 3160000.i2c:I2C_INT_MASK - 0x7c
tegra-i2c 3160000.i2c:I2C_INT_STATUS - 0x0
tegra-i2c 3160000.i2c:i2c transfer timed out addr 0x41
ina3221x 0-0041:ina3221x reset failure status:0xffffff92
tegra-i2c 3160000.i2c:pio timed out addr:0x42 tlen:16 rlen:0
tegra-i2c 3160000.i2c:— registe dump for debugging —
tegra-i2c 3160000.i2c:I2C_CNFG - 0x22c00
tegra-i2c 3160000.i2c:I2C_PACKET_TRANSFER_STATUS - 0x10001
tegra-i2c 3160000.i2c:I2C_FIFO_CONTROL - 0xe0
tegra-i2c 3160000.i2c:I2C_FIFO_STATUS - 0x800070
tegra-i2c 3160000.i2c:I2C_INT_MASK - 0x7c
tegra-i2c 3160000.i2c:I2C_INT_STATUS - 0x0
tegra-i2c 3160000.i2c:i2c transfer timed out addr 0x42
ina3221x 0-0042:ina3221x reset failure status:0xffffff92
tegra-i2c 3160000.i2c:pio timed out addr:0x43 tlen:16 rlen:0
tegra-i2c 3160000.i2c:— registe dump for debugging —
tegra-i2c 3160000.i2c:I2C_CNFG - 0x22c00
tegra-i2c 3160000.i2c:I2C_PACKET_TRANSFER_STATUS - 0x10001
tegra-i2c 3160000.i2c:I2C_FIFO_CONTROL - 0xe0
tegra-i2c 3160000.i2c:I2C_FIFO_STATUS - 0x800070
tegra-i2c 3160000.i2c:I2C_INT_MASK - 0x7c
tegra-i2c 3160000.i2c:I2C_INT_STATUS - 0x0
tegra-i2c 3160000.i2c:i2c transfer timed out addr 0x43
ina3221x 0-0043:ina3221x reset failure status:0xffffff92
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
cgroup:cgroup2:unknown option"nsdelegate"
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
tegra-xusb-padctl 3520000.xusb_padctl:failed to setup XUSB ports:-517
CPU1:shutdown
CPU2:shutdown
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)
vdd-1v8:voltage opration not allowed
shdci-tegra 3440000.sdhci:could not setregulator OCR (-1)

please give me some advice.

thanks

WayneWWW · January 7, 2020, 6:08am

Please read TX2 adaptation guide.

yupw24 · January 9, 2020, 8:21am

According to the TX2 adaptation guide description ,we should define a new name for our custom board,why ?And can we define a arbitrary name, as long as it conforms to the naming rules?

WayneWWW · January 9, 2020, 8:26am

Please just refer to the USB porting part in adaptation guide.

yupw24 · January 9, 2020, 9:35am

I keep the USB2.0 part the same as P2597, The three sets of USB3.0 signals USB1_D_N/USB1_D_P,USB3_RX1_N/USB3_RX1_P,USB3_TX1_N/USB3_TX1_P are connected to the USBHUB chip TUSB8041, and the enabling signal USB_VBUS_EN1 signal is suspended, so do I need to redefine the name of the custom board?

WayneWWW · January 9, 2020, 9:43am

I cannot give you a “yes” or “no” reply for sure. According to your log, there is something wrong when usb pad ctrl initialization. Normally, such issue leads to sw configuration in device tree.

You should share the full dmesg (please attach it as a file, otherwise the log paste will be truncated), and also the schematics.

Please also tell us what is your release.

You could also search similar topics on forum.

yupw24 · January 9, 2020, 10:08am

Thank you for your help.
The display of the screen at startup is shown as the picture in the attachment, and the schematic is shown as the PDF file in the attachment.The log file is also attached
Please help me and point out the problem.
syslog.log (2.22 MB)

usb2.0 and usb3.0.pdf (146 KB)

WayneWWW · January 10, 2020, 3:11am

Please reply the dmesg instead of syslog.

yupw24 · January 10, 2020, 3:29am

The attached file is the display information of dmesg.
dmesg.txt (63.7 KB)

WayneWWW · January 10, 2020, 4:18am

Do you connect the VDD_VBUS directly to the system power? Are you using any gpio to control it?

yupw24 · January 10, 2020, 4:45am

The VDD_VBUS of USB2.0 is converted by APL3511CBL-TRG, which is controlled by GPIO port USB_VBUS_EN0.USB3.0 is connected to the USBHUB chip TUSB8041, which has its own circuit and is powered by the same VDD_5V0_IO_SYS power network as USB2.0, but the GPIO port USB_VBUS_EN1 is not used,leaving it suspended.There are specific circuits in the attached file “usb2.0 and usb3.0. PDF”, .

WayneWWW · January 10, 2020, 5:34am

Please refer to adaptation guide “For an OTG (On-The-GO) Port” part and see if anything is missing on your design.
Did you modify anything in your device tree before?

yupw24 · January 10, 2020, 5:58am

I didn;t modify anything in my device tree before.

yupw24 · January 10, 2020, 9:34am

I have checked my designed with “For an OTG (On-The-GO) Port” part and found nothing missing .And here is the attachment is my design around OTG funtion block.Please if possible, help me find where goes wrong which will help me a lot in many ways.Also thanks you for your replaying.PS. the OTGpart is in Page 4.
tx2_v1.0_ip65.pdf (638 KB)

linuxdev · January 10, 2020, 6:16pm

Unless your wiring is a 100% exact match to the development kit reference carrier board you will need to modify the device tree. The device tree tells the SoC which pin is routed to where. Is your carrier board an exact match in schematic to the development kit?

yupw24 · January 13, 2020, 2:25am

My carrier board isn’t exact match in schematic to the devlopment kit,but the part of otg port is exact match to de development kit.Why this part is not work?

WayneWWW · January 13, 2020, 2:42am

You could try to add some debug messages in below function

kernel-4.9/drivers/phy/tegra/xusb.c

->static int tegra_xusb_setup_ports(struct tegra_xusb_padctl *padctl)

and see which case hits the error.

Please be aware that you may still need to change dts as linuxdev’s comment #15. For example, in your schematics, it seems only one micro AB usb port exists on your board. But there are 3x usb2.0 ports on devkit, if you don’t need 3 ports on your board, then please remove redundant ports from your dts.

yupw24 · January 15, 2020, 10:11am

Thanks for your help.
I add some debug messages in below function
kernel-4.9/drivers/phy/tegra/xusb.c

The following information is displayed on the screen after boot
of_property_read_u32 -22

What’s causing this, and how should I change the code

WayneWWW · January 16, 2020, 3:06am

There are 5 “of_property_read_u32” in this file.
Please at least tell us which function prints this error. Nobody can tell what goes wrong if you just told us one line.

yupw24 · January 16, 2020, 3:45am

Thanks for your help.
In file “kernel-4.9/drivers/phy/tegra/xusb.c”,the function “tegra_xusb_setup_ports” calls function “tegra_xusb_add_usb2_port”, function “tegra_xusb_add_usb2_port” calls function “tegra_xusb_usb2_port_parse_dt”, and the result ERR is equal to -22 on line 613 of function “tegra_xusb_usb2_port_parse_dt”, and the return value is -517 on line 621 of function “tegra_xusb_usb2_port_parse_dt”.
What’s causing this, and how should I change the code.