We built the Xavier board ourselves, which led to the USB3.0 & USB2.0 hub
r32.1 sdk: usb2.0 ok, usb3.0 ok
After upgrading the SDK version, change the same place for dts
r32.4.3 sdk: usb2.0 not ok, usb3.0 ok
We built the Xavier board ourselves, which led to the USB3.0 & USB2.0 hub
r32.1 sdk: usb2.0 ok, usb3.0 ok
After upgrading the SDK version, change the same place for dts
r32.4.3 sdk: usb2.0 not ok, usb3.0 ok
r32.1 sdk, dts modify as:
--- a/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0001-p2822-0000-common.dtsi
+++ b/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0001-p2822-0000-common.dtsi
@@ -96,7 +96,7 @@
status = "disabled";
};
ucsi_ccg: ucsi_ccg@8 {
- status = "okay";
+ status = "disabled";
typec-extcon {
typec_port0: port-0 {
status = "okay";
@@ -162,7 +162,7 @@
ports {
usb2-0 {
- mode = "otg";
+ mode = "host";
status = "okay";
};
usb2-1 {
@@ -195,9 +195,6 @@
#endif
tegra_xudc: xudc@3550000 {
- extcon-cables = <&typec_port0 0>;
- extcon-cable-names = "vbus";
- #extcon-cells = <1>;
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>;
@@ -209,9 +206,6 @@
};
tegra_xhci: xhci@3610000 {
- extcon-cables = <&typec_port0 1>;
- extcon-cable-names = "id";
- #extcon-cells = <1>;
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
@@ -329,32 +323,6 @@
};
};
-&head0 {
- extcon-cables = <&typec_port0 2 &typec_port1 2>;
- extcon-cable-names = "typec0", "typec1";
- #extcon-cells = <1>;
-};
-
-&head1 {
- extcon-cables = <&typec_port0 2 &typec_port1 2>;
- extcon-cable-names = "typec0", "typec1";
- #extcon-cells = <1>;
-};
-
-&head2 {
- extcon-cables = <&typec_port0 2 &typec_port1 2>;
- extcon-cable-names = "typec0", "typec1";
- #extcon-cells = <1>;
-};
-
-&sor0 {
- nvidia,typec-port = /bits/ 8 <0>;
-};
-
-&sor1 {
- nvidia,typec-port = /bits/ 8 <1>;
-};
-
hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0001-p2822-0000-common.dtsi
r32.4.3 sdk, The DTS changes the same as above
Please refer to adaptation guide
paste the board schematic/ the full dts /dmesg
USB2.0 hub → two usb2.0 type A
board schematic:
full dts:
tegra194-p2888-0001-p2822-0000-common.dtsi
/*
* Common include DTS file for CVM:P2888-0001 and CVB:P2822-0000 variants.
*
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#include "dt-bindings/extcon-ids.h"
#include "dt-bindings/gpio/tegra194-gpio.h"
#include "tegra194-p2888-0000-a00.dtsi"
#include <t19x-common-platforms/tegra194-platforms-eqos.dtsi>
#include "tegra194-p2822-0000-a00.dtsi"
#include "tegra194-power-tree-p2888-0001-p2822-1000.dtsi"
#include <t19x-common-platforms/tegra194-comms.dtsi>
#include "tegra194-thermal-p2888.dtsi"
#include "tegra194-plugin-manager-p2888-0000.dtsi"
#include "tegra194-plugin-manager-p2822-0000.dtsi"
#include "tegra194-super-module-e2614-p2888-0000.dtsi"
#include <t19x-common-platforms/tegra194-no-pll-aon-clock.dtsi>
/ {
nvidia,dtsfilename = __FILE__;
nvidia,dtbbuildtime = __DATE__, __TIME__;
nvidia,fastboot-usb-vid = <0x0955>;
nvidia,fastboot-usb-pid = <0xee1e>;
model = "Jetson-AGX";
compatible = "nvidia,galen", "nvidia,jetson-xavier", "nvidia,p2822-0000+p2888-0001", "nvidia,tegra194";
chosen {
bootargs ="console=ttyTCU0,115200";
board-has-eeprom;
};
firmware {
android {
compatible = "android,firmware";
hardware = "jetson-xavier";
vbmeta {
compatible = "android,vbmeta";
parts = "vbmeta,kernel,kernel-dtb,APP,vendor,SOS";
};
fstab {
compatible = "android,fstab";
vendor {
compatible = "android,vendor";
dev = "/dev/block/platform/3460000.sdhci/by-name/vendor";
type = "ext4";
mnt_flags = "ro";
fsmgr_flags = "wait,avb";
};
odm {
compatible = "android,odm";
dev = "/dev/block/platform/3460000.sdhci/by-name/odm";
type = "ext4";
mnt_flags = "ro";
fsmgr_flags = "wait,avb";
};
};
};
};
bluedroid_pm {
compatible = "nvidia,tegra-bluedroid_pm";
bluedroid_pm,reset-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(M, 6) 0>;
bluedroid_pm,host-wake-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Y, 0) 0>;
bluedroid_pm,ext-wake-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(M, 7) 0>;
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA194_MAIN_GPIO(Y, 0) 0x01>;
};
spi@c260000 {
status = "disabled";
};
spi@3210000 {
status = "okay";
spi@0 {
compatible = "spidev";
reg = <0x0>;
spi-max-frequency = <33000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
spi@1 {
compatible = "spidev";
reg = <0x1>;
spi-max-frequency = <33000000>;
controller-data {
nvidia,enable-hw-based-cs;
nvidia,rx-clk-tap-delay = <0x11>;
};
};
};
spi@3270000 {
status = "disabled";
};
spi@3300000 {
status = "disabled";
};
pmc@c370000 {
nvidia,invert-interrupt;
};
hdr40_i2c0: i2c@c240000 {
bmi160@69 {
compatible = "bmi,bmi160";
reg = <0x69>;
interrupt-parent = <&tegra_aon_gpio>;
interrupts = <TEGRA194_AON_GPIO(AA, 2) GPIO_ACTIVE_LOW>;
accelerometer_matrix = [01 00 00 00 01 00 00 00 01];
gyroscope_matrix = [01 00 00 00 01 00 00 00 01];
accelerometer_delay_us_min = <1250>;
gyroscope_delay_us_min = <1250>;
status = "disabled";
};
ucsi_ccg: ucsi_ccg@8 {
status = "disabled";
typec-extcon {
typec_port0: port-0 {
status = "okay";
#extcon-cells = <1>;
};
typec_port1: port-1 {
status = "okay";
#extcon-cells = <1>;
};
};
typec-pd {
typec_pd: pd {
status = "okay";
#extcon-cells = <1>;
};
};
};
};
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
xusb_padctl: xusb_padctl@3520000 {
status = "okay";
pads {
usb2 {
lanes {
usb2-0 {
nvidia,function = "xusb";
status = "okay";
};
usb2-1 {
nvidia,function = "xusb";
status = "okay";
};
usb2-2 {
nvidia,function = "xusb";
status = "okay";
};
usb2-3 {
nvidia,function = "xusb";
status = "okay";
};
};
};
usb3 {
lanes {
usb3-0 {
nvidia,function = "xusb";
status = "okay";
};
usb3-2 {
nvidia,function = "xusb";
status = "okay";
};
usb3-3 {
nvidia,function = "xusb";
status = "okay";
};
};
};
};
ports {
usb2-0 {
mode = "host";
status = "okay";
};
usb2-1 {
mode = "host";
status = "okay";
};
usb2-2 {
mode = "host";
status = "okay";
};
usb2-3 {
mode = "host";
status = "okay";
};
usb3-0 {
nvidia,usb2-companion = <1>;
status = "okay";
};
usb3-2 {
nvidia,usb2-companion = <0>;
status = "okay";
};
usb3-3 {
nvidia,usb2-companion = <3>;
nvidia,usb3-gen1-only= <1>;
status = "okay";
};
};
};
#endif
tegra_xudc: xudc@3550000 {
/*extcon-cables = <&typec_port0 0>;
extcon-cable-names = "vbus";
#extcon-cells = <1>; */
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>;
phy-names = "usb2", "usb3";
nvidia,xusb-padctl = <&xusb_padctl>;
#endif
nvidia,boost_cpu_freq = <1200>;
status = "okay";
};
tegra_xhci: xhci@3610000 {
/*extcon-cables = <&typec_port0 1>;
extcon-cable-names = "id";
#extcon-cells = <1>;*/
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-3}>,
<&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-2}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-0}>,
<&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-3}>;
phy-names = "usb2-0", "usb2-1", "usb2-3", "usb2-2",
"usb3-2", "usb3-0", "usb3-3";
nvidia,xusb-padctl = <&xusb_padctl>;
#endif
status = "okay";
};
arm-pmu {
status = "okay";
};
power-domain {
status = "disabled";
};
interrupt-controller {
status = "disabled";
};
mods-simple-bus {
status = "disabled";
};
eeprom-manager {
status = "disabled";
};
cpuidle {
compatible = "nvidia,tegra19x-cpuidle";
status = "okay";
};
thermal-zones {
status = "disabled";
};
reserved-memory {
ramoops_carveout {
status = "okay";
};
};
mttcan@c310000 {
status = "okay";
};
mttcan@c320000 {
status = "okay";
};
serial@3110000 {
status = "okay";
};
pwm@3280000 {
status = "okay";
};
pwm@32c0000 {
status = "okay";
};
pwm@32f0000 {
status = "okay";
};
hdr40_i2c1: i2c@31e0000 {
pinctrl-names = "default";
pinctrl-0 = <&dpaux_default>;
bmi160@69 {
compatible = "bmi,bmi160";
reg = <0x69>;
accelerometer_matrix = [01 00 00 00 01 00 00 00 01];
gyroscope_matrix = [01 00 00 00 01 00 00 00 01];
status = "disabled";
};
};
host1x {
dpaux@155F0000 {
status = "okay";
compatible = "nvidia,tegra194-dpaux3-padctl";
/delete-property/ power-domains;
dpaux_default: pinmux@0 {
dpaux3_pins {
pins = "dpaux3-3";
function = "i2c";
};
};
};
};
ufshci@2450000 {
status = "disabled";
nvidia,enable-hs-mode;
nvidia,cd-gpios = <&tegra_aon_gpio TEGRA194_AON_GPIO(EE, 0) GPIO_ACTIVE_HIGH>;
nvidia,cd-wakeup-capable;
};
pfsd {
pwm_polarity= <PWM_POLARITY_NORMAL>;
suspend_state = <0>;
};
clocks-init {
compatible = "nvidia,clocks-config";
status = "okay";
disable {
clocks = <&aon_clks TEGRA194_CLK_PLLAON>,
<&bpmp_clks TEGRA194_CLK_CAN1>,
<&bpmp_clks TEGRA194_CLK_CAN2>;
};
};
};
/*
&head0 {
extcon-cables = <&typec_port0 2 &typec_port1 2>;
extcon-cable-names = "typec0", "typec1";
#extcon-cells = <1>;
};
&head1 {
extcon-cables = <&typec_port0 2 &typec_port1 2>;
extcon-cable-names = "typec0", "typec1";
#extcon-cells = <1>;
};
&head2 {
extcon-cables = <&typec_port0 2 &typec_port1 2>;
extcon-cable-names = "typec0", "typec1";
#extcon-cells = <1>;
};
*/
&sor0 {
nvidia,typec-port = /bits/ 8 <0>;
};
&sor1 {
nvidia,typec-port = /bits/ 8 <1>;
};
#if LINUX_VERSION >= 414
#include <tegra194-linux-4.14.dtsi>
#endif
tegra194-power-tree-p2888-0001-p2822-1000.dtsi
/*
* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#include "tegra194-spmic-p2888-0001.dtsi"
#include "tegra194-fixed-regulator-p2888-0001.dtsi"
#include "tegra194-fixed-regulator-p2822-1000.dtsi"
#include "dt-bindings/gpio/tegra194-gpio.h"
/ {
sdhci@3460000 {
vmmc-supply = <&p2888_spmic_ldo3>;
vqmmc-supply = <&p2888_spmic_sd2>;
};
sdhci@3400000 {
vmmc-supply = <&p2822_vdd_sdmmc1_sw>;
};
ufshci@2450000 {
vcc-supply = <&p2822_vdd_sdmmc1_sw>;
vccq-supply = <&p2888_spmic_ldo7>;
vccq2-supply = <&p2888_spmic_sd2>;
};
ether_qos@2490000 {
vddio_sys_enet_bias-supply = <&battery_reg>;
vddio_enet-supply = <&battery_reg>;
phy_vdd_1v8-supply = <&p2888_spmic_sd2>;
phy_ovdd_rgmii-supply = <&p2888_spmic_sd2>;
phy_pllvdd-supply = <&battery_reg>;
};
vdd_usb20_5v0: regulator@115 {
compatible = "regulator-fixed";
reg = <115>;
regulator-name = "vdd-usb20-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(Z, 1) 0>;
vin-supply = <&battery_reg>;
};
#if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
xusb_padctl@3520000 {
pex_dvdd-supply = <&p2888_spmic_sd0>;
pex_hvdd-supply = <&p2888_spmic_sd1>;
pex_pll_hvdd-supply = <&p2888_spmic_sd1>;
vclamp_usb-supply = <&p2888_spmic_sd3>;
avdd_usb-supply = <&p2888_spmic_ldo5>;
avdd_pll_nvhs_eutmip-supply = <&p2888_spmic_sd1>;
ports {
usb2-0 {
vbus-supply = <&vdd_usb20_5v0>;
};
usb2-1 {
vbus-supply = <&vdd_usb20_5v0>;
};
usb2-2 {
vbus-supply = <&vdd_usb20_5v0>;
};
usb2-3 {
vbus-supply = <&vdd_usb20_5v0>;
};
};
};
#endif
xudc@3550000 {
avdd-usb-supply = <&p2888_spmic_ldo5>;
};
pwm-fan {
vdd-fan-supply = <&p2822_vdd_fan>;
};
bpmp_i2c {
spmic@3c {
regulators {
sd0 {
regulator-enable-ramp-delay = <3960>;
regulator-disable-ramp-delay = <660>;
ramp-rate-setting = <27500>;
regulator-ramp-delay = <1100>;
};
sd1 {
regulator-enable-ramp-delay = <3310>;
regulator-disable-ramp-delay = <2000>;
ramp-rate-setting = <27500>;
regulator-ramp-delay = <550>;
};
sd2 {
regulator-enable-ramp-delay = <3310>;
regulator-disable-ramp-delay = <1970>;
ramp-rate-setting = <27500>;
regulator-ramp-delay = <550>;
};
sd3 {
regulator-enable-ramp-delay = <2130>;
regulator-disable-ramp-delay = <1970>;
ramp-rate-setting = <27500>;
regulator-ramp-delay = <350>;
};
sd4 {
regulator-enable-ramp-delay = <2650>;
regulator-disable-ramp-delay = <1300>;
ramp-rate-setting = <27500>;
regulator-ramp-delay = <700>;
};
ldo0 {
regulator-enable-ramp-delay = <160>;
regulator-disable-ramp-delay = <4480>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <200>;
};
ldo1 {
regulator-enable-ramp-delay = <2650>;
regulator-disable-ramp-delay = <1300>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <1150>;
};
ldo2 {
regulator-enable-ramp-delay = <4670>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <1500>;
};
ldo3 {
regulator-enable-ramp-delay = <4670>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <1500>;
};
ldo4 {
regulator-enable-ramp-delay = <3310>;
regulator-disable-ramp-delay = <1970>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <2200>;
};
ldo5 {
regulator-enable-ramp-delay = <4670>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <1500>;
};
ldo6 {
regulator-enable-ramp-delay = <4690>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <1500>;
};
ldo7 {
regulator-enable-ramp-delay = <3960>;
regulator-disable-ramp-delay = <660>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <3350>;
};
ldo8 {
regulator-enable-ramp-delay = <3960>;
regulator-disable-ramp-delay = <660>;
ramp-rate-setting = <100000>;
regulator-ramp-delay = <2250>;
};
};
};
};
};
Please just attach the file with the upload button.
Didn’t you say you made some patch to you dts? Why do you post the old one here?
Please do not share your patch in such way.
Just remove those lines there. Do not use comment out.
Or just convert your dtb back to dts and attach it here so that it will be just one file.
And also the dmesg.
Which port has problem now ? usb2-0?
Hardware connection: USB2.0 hub connect USB2_D1P & USB2_D1N ;
I’m not sure if this USB2 2.0 corresponds to USB2-0 or USB2-1 in dts
dmesg dmesg.log (71.0 KB)
How many usb ports exist on your board? Are other board working fine?
one USB3.0 typeA : work fine
two USB2.0 type A (usb2.0 hub connect) : not work
one micro usb : work fine
one USB3.0 typeA : work fine
Which usb2 is coupled with this usb3 port?
And you make a micro usb but no OTG function…? Just make a port for flash but do not want to use otg function after kernel?
no, Mutually independent
We do not support a standalone usb 3 port. A usb 3 port must accompany with a usb 2 port…
This is indicated in adaptation guide.
I can only tell you that your board description does not match your device tree at all… Since you didn’t provide the whole schematic, I cannot comment here. Please try to read the adaptation guide first…
https://developer.nvidia.com/embedded/downloads#?search=adaptation