Hi everyone, the Xavier SoC Technical Reference Manual (TRM) has now been posted!
See here for the other Jetson AGX Xavier documentation and resources currently available:
Hi everyone, the Xavier SoC Technical Reference Manual (TRM) has now been posted!
See here for the other Jetson AGX Xavier documentation and resources currently available:
Can you provide the content of this TRM to help what included? If possible, a SoC architecture block diagram can be provided?
Please find the Xavier Series SoC Technical Reference Manual from download center below:
https://developer.nvidia.com/embedded/downloads
Got it, thank you
is the TRM applicable to NX, or there exists a separate TRM for NX’es?
Hi Andrey1984,
The TRM is applicable to NX.
NX is really a subset of AGX from a feature standpoint, so the Xavier TRM on the DLC should suffice.
Solved
Hi, just stumbled upon this.
But the download seems broken now.
If I click the download link, nothing happens.
Any help?
Edit:
O.k., found the updated one with the license agreement step. Therefore forget, what I said. :)
I am trying to find the in e TRM where is J6 on AGX xavier to find A5 & A6 pins, but search doesn’t seem to return any results. is the trm the right document to find the location of these?
Upd: it was more handy to use the short AGX user guide to find that J6 is 16x PCI express slot, but which pins of it are exactly A5/ A6?
TRM is for SoC aspect information. We sell the Xavier/NX module but don’t give you the single SoC. Thus, for pin information, the design guide is the proper document.