Adapting Kernel Driver from TX2 to AGX

Hello,

I am trying to use a custom sensor on the AGX. I have already tested it on the TX2. Therefore I have all the sources from the custom kernel and also the device-tree in Folder /t18x. Now I have started to adapt the device-tree to the structure of the AGX (Folder /t19x).

First Question:
1.) Changes should only be necessary for the device-tree, is that right? Because the changes of the kernel and the compiled Image/zImage files are independent of any jetson-tx2/xavier specific parameters.

We use the Camera Expansion Header on both development boards. Therefore we have an “Auvidea J20” MIPI Expander. On TX2 we used the I2C-Bus “c240000”. But when I try to boot the xavier and use the same I2C-Bus, then I get an error message “tegra-i2c c240000.i2c: no acknowledge from address0x30”. On the TX2 it is booting, so it has to get an ACK from this device.

Second Question:
Which I2C-Bus on the AGX is equivalent to the “c240000” on TX2? The sensor is connected to the Port 1 on the Auvidea J20 Board.

Third (General) Question:
Are there any other hints for Debugging? What may be the problem between TX2 and AGX?

Thanks

hello m.lenz,

may I know you’d like to port camera sensor kernel drivers with the same JetPack release, but different platforms?
you may use the same camera sensor kernel drivers, but you’ll need to create another device tree for AGX platforms.
please check Camera Modules and the Device Tree chapter to have implementation. you should also check Technical Reference Manual for reviewing i2c address.

moreover, there’s usually sensor clock property settings need to reconfigure when porting from TX2 to Xavier, please refer to Sensor Pixel Clock session to review your clock settings.
please also check Debugging Tips session to examine your sensor drivers.
thanks

Thanks for your help.
I found out that the jetson is booting with i2c4 and also i2c7. But there are still some problems.

The i2c4 is the I2C_GP4_SDA and I2C_GP4_SCL and is connected to the camera Expansion Header on pins 105 and 107. From there it is connected to a level shifter (I think so) on the Auvidea J20 Board. Could you please tell me the logic Levels used on TX2 and AGX?

But with i2c4 not all kernel components are loaded. But it’s working with i2c7 instead! If I choose c250000 in the device-tree I have access to my sensor and I can see data on the i2c bus line. But the low level of my data line looks not good. I have attached an image of that. Do you have an idea why this could happen? Is there a high series resistor in the i2c SDA line? And why can I see data on the line which should be i2c4 when I use i2c7?

Thanks

I2C4 is DP_AUX_CH1 for DP on devkit, it is not I2C.

I2C7 is DP_AUX_CH2 for HDMI, it is I2C.

Okay, do you also have any information about schematics? Is there any resistor in series for input protection reason in SDA of i2c7? I’m still wondering why the low level is so high… See the big difference to the ACK…

The schematic is in DLC: http://developer.nvidia.com/embedded/dlc/jetson-xavier-developer-kit-carrier-board-design-files