ADIS16475 - SPI CE Signal Goes High When It Should Stay Low to Allow the Chip to Respond

[KevinFFF]

@wiktort52

Then, as a last resort, I used the jetson-io.py tool to reconfigure the header, and it worked for both of the interfaces. When I inspected the files that it generated

Sorry for missing them.

@wiktort52

It seems that those overlays are basically doing the same thing as the configs from the spreadsheet, but with macros, and somehow this works

They should do the similar things for pin configurations.
The pinmux/gpio dtsi are loaded in early-boot(MB1) while Jetson-IO configure the kernel device to make those pin configured by tegra pinctrl driver. They are configured in different stage, but both should work.

It’s fine since Jetson-IO works for SPI loopback test in your case.

@wiktort52

I get very strange timings. Chip enable goes high when the clock for the IMU’s response is provided:

Do you mean the CS behavior is nor expected?
If so, please apply the patch from Jetson orin nano SPI Speed not changing - #9 by KevinFFF to check if it could help.