No SPI Signals

I am using SPI0.0 and am getting no SPI output on the 40pin connector:

I can open the device with no errors( I get an FD)
I can do a ioctl call to write the data with no errors.
But I get no CS, SCLK etc.

sudo ./spidev_test -v -D /dev/spidev0.0
Any ideas?

asei@asei-nx-v4:~$ ls /dev/spi*
/dev/spidev0.0  /dev/spidev0.1  /dev/spidev2.0  /dev/spidev2.1
asei@asei-nx-v4:~$ dmesg | grep spi
[    0.719383] iommu: Adding device 3210000.spi to group 7
[    0.719730] iommu: Adding device 3230000.spi to group 8
[    0.720105] iommu: Adding device 3270000.spi to group 9
[    1.563000] qspi_mtd spi6.0: s25fs256s SSG 8 0 1000 2000000
[    1.563012] qspi_mtd spi6.0: s25fs256s (32768 Kbytes)
[    1.563021] qspi_mtd spi6.0: mtd .name = spi6.0, .size = 0x2000000 (32MiB) .erasesize = 0x00010000 (64KiB) .numeraseregions = 0
[    1.563303] 1 ofpart partitions found on MTD device spi6.0
[    1.563310] Creating 1 MTD partitions on "spi6.0":
[   12.236594] Modules linked in: fuse xt_conntrack ipt_MASQUERADE nf_nat_masquerade_ipv4 nf_conntrack_netlink nfnetlink xt_addrtype iptable_filter iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack br_netfilter bnep zram overlay rtk_btusb btusb btrtl btbcm btintel userspace_alert rtl8822ce cfg80211 nvgpu spidev ip_tables x_tables
asei@asei-nx-v4:~$ sudo grep spi /sys/kernel/debug/tegra_pinctrl_reg
[sudo] password for asei: 
Bank: 1 Reg: 0x0c302028 Val: 0x00000052 -> spi2_mosi_pcc2
Bank: 1 Reg: 0x0c302038 Val: 0x00000002 -> spi2_cs0_pcc3
Bank: 1 Reg: 0x0c302048 Val: 0x00000002 -> spi2_sck_pcc0
Bank: 1 Reg: 0x0c302050 Val: 0x00000002 -> spi2_miso_pcc1
Bank: 0 Reg: 0x0243b000 Val: 0x00023440 -> qspi0_io3_pc5
Bank: 0 Reg: 0x0243b008 Val: 0x00023440 -> qspi0_io2_pc4
Bank: 0 Reg: 0x0243b010 Val: 0x00023440 -> qspi0_io1_pc3
Bank: 0 Reg: 0x0243b018 Val: 0x00023440 -> qspi0_io0_pc2
Bank: 0 Reg: 0x0243b020 Val: 0x00023460 -> qspi0_sck_pc0
Bank: 0 Reg: 0x0243b028 Val: 0x00023400 -> qspi0_cs_n_pc1
Bank: 0 Reg: 0x0243b030 Val: 0x00023415 -> qspi1_io3_pd3
Bank: 0 Reg: 0x0243b038 Val: 0x00023415 -> qspi1_io2_pd2
Bank: 0 Reg: 0x0243b040 Val: 0x00023415 -> qspi1_io1_pd1
Bank: 0 Reg: 0x0243b048 Val: 0x00023415 -> qspi1_io0_pd0
Bank: 0 Reg: 0x0243b050 Val: 0x00023435 -> qspi1_sck_pc6
Bank: 0 Reg: 0x0243b058 Val: 0x00023415 -> qspi1_cs_n_pc7
Bank: 0 Reg: 0x0243b060 Val: 0x00002000 -> qspi_comp
Bank: 0 Reg: 0x0243d008 Val: 0x00000055 -> spi3_miso_py1
Bank: 0 Reg: 0x0243d010 Val: 0x00000059 -> spi1_cs0_pz6
Bank: 0 Reg: 0x0243d018 Val: 0x00000055 -> spi3_cs0_py3
Bank: 0 Reg: 0x0243d020 Val: 0x00000055 -> spi1_miso_pz4
Bank: 0 Reg: 0x0243d028 Val: 0x00000055 -> spi3_cs1_py4
Bank: 0 Reg: 0x0243d040 Val: 0x00000055 -> spi1_sck_pz3
Bank: 0 Reg: 0x0243d048 Val: 0x00000055 -> spi3_sck_py0
Bank: 0 Reg: 0x0243d050 Val: 0x00000059 -> spi1_cs1_pz7
Bank: 0 Reg: 0x0243d058 Val: 0x00000055 -> spi1_mosi_pz5
Bank: 0 Reg: 0x0243d060 Val: 0x00000055 -> spi3_mosi_py2
 gpio-480 (SPI1_SCK            )
 gpio-481 (SPI1_MISO           )
 gpio-482 (SPI1_MOSI           )
 gpio-483 (SPI1_CS0            )
 gpio-484 (SPI1_CS1            )
 gpio-485 (                    )
 gpio-486 (                    )
 gpio-487 (                    )
 gpio-488 (                    )
 gpio-489 (                    |external-connection:) in  hi    
 gpio-490 (                    )
 gpio-491 (SPI0_SCK            )
 gpio-492 (SPI0_MISO           )
 gpio-493 (SPI0_MOSI           )
 gpio-494 (SPI0_CS0            )
 gpio-495 (SPI0_CS1            )

Could you try verify by the loopback test with spidev_test.

I tried several of the examples that are displayed and got “TEST FAILED !!! (status -1)” on all of them.

Is this the same code as the spidev_test.c? I have run that and do not get any fails.

It does not look like the same code because I do not see the -g or -n options.

Can you send me your spidev_test.c?

Did you connect those pin as loopback?

Yes.
mosi(19) -MISO(21)

The pin configure looks like incorrect. Using jetson-io.py to configure the SPI function to verify.

https://docs.nvidia.com/jetson/l4t/Tegra%20Linux%20Driver%20Package%20Development%20Guide/hw_setup_jetson_io.html

What would cause that.
The change I made for SPI was to change “disable” to “OKAY”

Is that a pinout for a different NVIDIA?
I am using a NX

based on

The GPIOs are correct.
If that is incorrect could you point me to documnetation for what they should be.

Based on the jetson_io.py I have the 40 pin conections correct.

Based on:
NVIDIA Jetson Xavier NX Developer Kit Carrier Board P3509_A01 SP-09765-001_v1.0 pg 22.
The GPIOs are correct.

The pin configure should be like below.

Bank: 0 Reg: 0x0243d010 Val: 0x00000448 -> spi1_cs0_pz6
Bank: 0 Reg: 0x0243d020 Val: 0x00000444 -> spi1_miso_pz4
Bank: 0 Reg: 0x0243d040 Val: 0x00000444 -> spi1_sck_pz3
Bank: 0 Reg: 0x0243d050 Val: 0x00000448 -> spi1_cs1_pz7
Bank: 0 Reg: 0x0243d058 Val: 0x00000444 -> spi1_mosi_pz5
Bank: 0 Reg: 0x0243d008 Val: 0x00000444 -> spi3_miso_py1
Bank: 0 Reg: 0x0243d018 Val: 0x00000448 -> spi3_cs0_py3
Bank: 0 Reg: 0x0243d028 Val: 0x00000448 -> spi3_cs1_py4
Bank: 0 Reg: 0x0243d048 Val: 0x00000444 -> spi3_sck_py0
Bank: 0 Reg: 0x0243d060 Val: 0x00000444 -> spi3_mosi_py2

What would cause this to be wrong?

Do you have a suggestion as to how to fix.

As my early comment to use jetson-io to configure those pins.

I can’t there are other changes like pps and the pps input pin and adding the sd card that have been made in other files. These are lost if I use jetson_io.

What file causes these addresses? I changed disabled to okay in the 194 SPI (not at work so not sure of file name)

Add below 40pin configure to you device tree.

	pinmux@2430000 {
...
...
...
		header-40pin-pinmux {
			phandle = <0x179>;
			linux,phandle = <0x179>;

			pin37 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi3_mosi_py2";
				nvidia,function = "spi3";
			};

			pin28 {
				nvidia,lpdr = <0x1>;
				nvidia,io-high-voltage = <0x1>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "gen2_i2c_scl_pcc7";
				nvidia,function = "i2c2";
			};

			pin27 {
				nvidia,lpdr = <0x1>;
				nvidia,io-high-voltage = <0x1>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "gen2_i2c_sda_pdd0";
				nvidia,function = "i2c2";
			};

			pin26 {
				nvidia,lpdr = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi1_cs1_pz7";
				nvidia,function = "spi1";
			};

			pin24 {
				nvidia,lpdr = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi1_cs0_pz6";
				nvidia,function = "spi1";
			};

			pin23 {
				nvidia,lpdr = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi1_sck_pz3";
				nvidia,function = "spi1";
			};

			pin22 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi3_miso_py1";
				nvidia,function = "spi3";
			};

			pin21 {
				nvidia,lpdr = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi1_miso_pz4";
				nvidia,function = "spi1";
			};

			pin19 {
				nvidia,lpdr = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi1_mosi_pz5";
				nvidia,function = "spi1";
			};

			pin18 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi3_cs0_py3";
				nvidia,function = "spi3";
			};

			pin16 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x2>;
				nvidia,pins = "spi3_cs1_py4";
				nvidia,function = "spi3";
			};

			pin13 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x1>;
				nvidia,pins = "spi3_sck_py0";
				nvidia,function = "spi3";
			};

			pin10 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x1>;
				nvidia,tristate = <0x1>;
				nvidia,pull = <0x2>;
				nvidia,pins = "uart1_rx_pr3";
				nvidia,function = "uarta";
			};

			pin8 {
				nvidia,lpdr = <0x0>;
				nvidia,io-high-voltage = <0x0>;
				nvidia,enable-input = <0x0>;
				nvidia,tristate = <0x0>;
				nvidia,pull = <0x0>;
				nvidia,pins = "uart1_tx_pr2";
				nvidia,function = "uarta";
			};
		};

Where is that, what file. I have been editing dtsi for the SPI and pps.

It’s pinmux configure for SPI

Ok. What file does it go into, a dtsi or dts

Have reference to below topic.

I have the above in:
~/nvidia/nvidia_sdk/JetPack_4.6_Linux_JETSON_XAVIER_NX_TARGETS/Linux_for_Tegra/sources/hardware/nvidia/soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-spi.dtsi

What I need to know is where do I put the pinmux that you gave me.

Thanks,

Add to in the pinmux@2430000{}

What file?