according to your tracing logs, there’s no frame related signal received by VI engine.
may I confirm the Jetpack release version you’re working with,
since the latest JP-5 release has address some issue of SerDes chip use-case. is it possible for moving to r35.5.0 for verification.
is that mean our SerDes chip driver maybe not trigger frame signal? Or is there have some manuals describes for frame signal trigger mode(like external or internal), which is supported by orin.
Thx
Hi, Jerry
I have checkout the r35.5.0 SerDes chip use-case about max96712,but i have some question about pipe usage in ORIN:
here,
in hawk_owl_mode_tbls.h.
Is that mean streaming issues with max96712 maybe in ORIN ,so I need to copy these Desdes register configure to avoiding pipe issues.
Thx
CSI/VI it’s a receiver for waiting sensor’s MIPI signaling, so, you must confirm there’re
signaling on the CSI channel, and effective frame packets (SoF,EoF…etc) for VI engine.
that code snippets shows the configuration on driver side, and… it’s part of Deser/ser programming as you can see in the ar0234_probe().
I’m not sure whether you’re using the exactly same hardware, please check the SerDes spec to ensure those settings are necessary for your use-case.
there should be lot of logs has reported,
the most important logs you may dig into are a pair of CHANSEL_PXL_SOF (start-of-frame) and CHANSEL_PXL_EOF (end-of-frame), which indicate one effective frame for VI engine.