CAN0 CAN1 回环测试

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
1

Jetson AGX Orin Devkit

JetPack 7.2.1 with Jetson Linux 39.2.1

按图示连接CAN0 CAN1

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image1350×862 153 KB

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以下是串口执行过程：

root@tegra-ubuntu:/home/chip# busybox devmem 0x0c303018 w 0xc458
root@tegra-ubuntu:/home/chip# busybox devmem 0x0c303010 w 0xc400
root@tegra-ubuntu:/home/chip# busybox devmem 0x0c303008 w 0xc458
root@tegra-ubuntu:/home/chip# busybox devmem 0x0c303000 w 0xc400
root@tegra-ubuntu:/home/chip# modprobe can
root@tegra-ubuntu:/home/chip# modprobe can_raw
root@tegra-ubuntu:/home/chip# modprobe mttcan
root@tegra-ubuntu:/home/chip# ip link set can0 up type can bitrate 500000 dbitrate 1000000 berr-reporting on fd on
root@tegra-ubuntu:/home/chip# ip link set can1 up type can bitrate 500000 dbitrate 1000000 berr-reporting on fd on
root@tegra-ubuntu:/home/chip# candump -x any &
[1] 3336
root@tegra-ubuntu:/home/chip# cansend can0 123#abcdabcd
[ 635.225510] mttcan c310000.mttcan can0: entered error warning state
[ 635.232025] mttcan c310000.mttcan can0: entered error passive state
[ 635.238505] mttcan c310000.mttcan can0: Format Error Detected
[ 635.244431] mttcan_poll_ir: 247 callbacks suppressed
[ 635.249558] mttcan c310000.mttcan can0: IR 0x9810000 PSR 0x77a
[ 635.255607] mttcan c320000.mttanoot@tegra-ubed errhomwarnin# tate
[ 635.262104] mttcan c320000.mttcan can1: entered error passive state
[ 635.268583] mttcan c320000.mttcan can1: Bit0 Error Detected
[ 635.274337] mttcan c320000.mttcan can1: IR 0x9810000 PSR 0x775
[ 635.280408] mttcan c310000.mttcan can0: entered bus off state
[ 635.286345] mttcan c310000.mttcan can0: Bit0 Error Detected
[ 635.292102] mttcan c310000.mttcan can0: IR 0xa000000 PSR 0x7e5

root@tegra-ubuntu:/home/chip# ip link set can0 down
root@tegra-ubuntu:/home/chip# ip link set can0 type can bitrate 500000 loopback on
root@tegra-ubuntu:/home/chip# ip link set can0 up
[ 675.926212] mttcan c310000.mttcan can0: Bit0 Error Detected
root@tegra-ubuntu:/home/chip# [ 675.931982] mttcan c310000.mttcan can0: IR 0xa000000 PSR 0x70d
root@tegra-ubuntu:/home/chip# cansend can0 123#abcdabcd
[ 683.035047] mttcan c320000.mttcan can1: Bit0 Error Detected
root@tegra-ubuntu:/home/chip# [ 683.040831] mttcan c320000.mttcan can1: IR 0x8010000 PSR 0x775
can0 RX - - 123 [4] AB CD AB CD
can0 TX - - 123 [4] AB CD AB CD

内部控制器环回是可以的，但是CAN0-CAN1h回环收不到数据。

4

Internal loopback on only tests the mttcan controller. It does not use J30 pins. That test passing is expected.

CAN0_DIN↔CAN1_DOUT and CAN0_DOUT↔CAN1_DIN cannot work. On AGX Orin DevKit J30 those signals are 3.3 V CAN_TX / CAN_RX, not CANH/CANL. CAN is not UART: the transmitter must monitor its own bits on a wired-AND bus. With a TX/RX crossover, the sender does not see its own dominant bits, so you get Bit0 Error, then error-passive / bus-off. That matches your log (Format Error / Bit0 Error / IR 0x9810000).

For CAN0–CAN1 on Orin you need two transceivers (e.g. WaveShare SN65HVD230):

  • CAN0_DOUT (J30 pin 31) → transceiver0 TX
  • CAN0_DIN (J30 pin 29) → transceiver0 RX
  • CAN1_DOUT (J30 pin 33) → transceiver1 TX
  • CAN1_DIN (J30 pin 37) → transceiver1 RX
  • 3.3 V and GND to both transceivers
  • transceiver0 CANH ↔ transceiver1 CANH
  • transceiver0 CANL ↔ transceiver1 CANL
  • 120 Ω between CANH and CANL at each transceiver

Then (no loopback on; start without FD):

busybox devmem 0x0c303018
busybox devmem 0x0c303010
busybox devmem 0x0c303008
busybox devmem 0x0c303000

ip link set can0 down
ip link set can1 down
ip link set can0 up type can bitrate 500000
ip link set can1 up type can bitrate 500000
candump -x any &
cansend can0 123#abcdabcd
cansend can1 123#12345678

Pinmux values 0xc458 / 0xc400 are correct for AGX Orin; confirm they read back after devmem. The Thor J47 CAN0_H/CAN1_H short in the same document is for Thor only, not Orin DIN/DOUT.

Please confirm whether transceivers are in the path, and share a photo of CANH/CANL plus termination if it still fails.

Correct external CAN0–CAN1 test (R39.2 CAN guide):

5

谢谢ShaneCCC。

只剩最后一个问题：如何让这四条配置持久生效？

busybox devmem 0x0c303018 w 0xc458
busybox devmem 0x0c303010 w 0xc400
busybox devmem 0x0c303008 w 0xc458
busybox devmem 0x0c303000 w 0xc400

6

You can config by jetson-io.

Thanks