Configuring displays: route heads and sor nodes

Hi all,

We have a custom board for the AGX Xavier in which the three display controllers from the SoM stream video through HDMI interfaces. So, considering that the default for the AGX Xavier devkit is the following one:

fb0: Head0->SOR2->HDMI
fb1: Head1->SOR0->DP0 (Display Port)
fb2: Head2->SOR1->DP1

the one we need would be:

fb0: Head0->SOR2->HDMI
fb1: Head1->SOR0->HDMI
fb2: Head2->SOR1->HDMI

I’m testing first the HDMI SOR0 connection, so I started by disabling Head0 and Head1 nodes in the dev tree. The first question I have is: is it correct to do this? even if the Head1 is meant to be fb1, can we disabled Head0 and Head2 and use fb1:Head1?

I also tried to do the following connection in the dev tree:
fb0: Head0->SOR0->HDMI
and disabled Head1 and Head2, but then for some reason the board gets stuck and start restarting itself continuously. The last message before restating is:

[ 0.015911] bootconsole [tegra_comb_uart0] disabled

Hi,

It is fine. head can be configured to different sor. The real problem here may due to the device tree. Since the devkit is using type C so DP is sharing with usb, you need to make some change in device tree.

Please refer to this thread. Recently we help resolve one issue to use 2 HDMI port on custom board +Xavier.

https://devtalk.nvidia.com/default/topic/1056529

Hi WayneWWW

I tried to follow that thread, but I cannot fully follow what were the proper steps…

For example, should the registers 0x02440030, 0x02440038 and 0x02440040 have the value 0x450 in all of them? because in my case they are:

xavier@tegra-ubuntu:~$ sudo devmem2 0x02440030 w
/dev/mem opened.
Memory mapped at address 0x7fa2900000.
Value at address 0x2440030 (0x7fa2900030): 0x450
xavier@tegra-ubuntu:~$ sudo devmem2 0x02440038 w
/dev/mem opened.
Memory mapped at address 0x7fa9e85000.
Value at address 0x2440038 (0x7fa9e85038): 0x450
xavier@tegra-ubuntu:~$ sudo devmem2 0x02440040 w
/dev/mem opened.
Memory mapped at address 0x7f7ddc4000.
Value at address 0x2440040 (0x7f7ddc4040): 0x150

Additionally, I also removed the following in the common.dtsi file as we don’t have the usci_ccg device in our custom board:

//       i2c@c240000 {
//               ucsi_ccg: ucsi_ccg@8 {
//                       status = "disabled"; 
//                       typec-extcon {
//                              typec_port0: port-0 {
//                                      status = "okay";
//                                      #extcon-cells = <1>;
//                              };
//                              typec_port1: port-1 {
//                                      status = "okay";
//                                      #extcon-cells = <1>;
//                              };
//                      };
//                      typec-pd {
//                              typec_pd: pd {
//                                      status = "okay";
//                                      #extcon-cells = <1>;
//                              };
//                      };
//              };
//      };


...

        xusb_padctl: xusb_padctl@3520000 {
@@ -194,9 +172,6 @@
 #endif
 
        tegra_xudc: xudc@3550000 {
//              extcon-cables = <&typec_port0 0>;
//              extcon-cable-names = "vbus";
//              #extcon-cells = <1>;
 #if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
                phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
                        <&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-2}>;
@@ -208,9 +183,6 @@
        };
 
        tegra_xhci: xhci@3610000 {
//              extcon-cables = <&typec_port0 1>;
//              extcon-cable-names = "id";
//              #extcon-cells = <1>;
 #if TEGRA_XUSB_PADCONTROL_VERSION >= DT_VERSION_2
                phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>,
                        <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>,
@@ -281,25 +253,6 @@
                status = "disabled"; // this is not even routed in fast-prototype
        };



//&head0 {
//      extcon-cables = <&typec_port0 2 &typec_port1 2>;
//      extcon-cable-names = "typec0", "typec1";
//      #extcon-cells = <1>;
//};

//&head1 {
//      extcon-cables = <&typec_port0 2 &typec_port1 2>;
//      extcon-cable-names = "typec0", "typec1";
//      #extcon-cells = <1>;
//};

//&head2 {
//      extcon-cables = <&typec_port0 2 &typec_port1 2>;
//      extcon-cable-names = "typec0", "typec1";
//      #extcon-cells = <1>;
//};

//&sor0 {
//      nvidia,typec-port = /bits/ 8 <0>;
//};

//&sor1 {
//      nvidia,typec-port = /bits/ 8 <1>;
//};

I’m attaching also the content of disp dtsi file:

/*
 * tegra194-custom-board-disp.dtsi:
 *
 * Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 *
 * t194 galen product uses 3 display heads out of the 4 available on t194:
 *	fb0: Head0->SOR2->HDMI
 *	fb1: Head1->SOR0->HDMI
 *	fb2: Head2->SOR1->HDMI
 * Each display head is assigned two windows each.
 */

#include <dt-bindings/display/tegra-dc.h>
#include <dt-bindings/display/tegra-panel.h>
#include <t19x-common-platforms/tegra194-hdmi.dtsi>
#include "tegra194-fixed-regulator-custom-board-0000.dtsi"
#include "tegra194-spmic-p2888-0001.dtsi"

&head0 {
	status = "okay";
	nvidia,fb-bpp = <32>;
	nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */
	nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
	win-mask = <0x3>;
	nvidia,fb-win = <0>;
	nvidia,dc-connector = <&sor2>;
	nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
	avdd_hdmi-supply = <&p2888_spmic_sd0>; /* 1v0 */
	avdd_hdmi_pll-supply = <&p2888_spmic_sd1>; /* 1v8 */
	vdd_hdmi_5v0-supply = <&custom_board_hdmi_0_en>;
};

&head1 {
	status = "okay";
	nvidia,fb-bpp = <32>;
	nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */
	nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
	win-mask = <0xC>;
	nvidia,fb-win = <2>;
	nvidia,dc-connector = <&sor0>;
	nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
	avdd_hdmi-supply = <&p2888_spmic_sd0>; /* 1v0 */
	avdd_hdmi_pll-supply = <&p2888_spmic_sd1>; /* 1v8 */
	vdd_hdmi_5v0-supply = <&custom_board_hdmi_1_en>;
};

&head2 {
	status = "disabled";
	nvidia,fb-bpp = <32>;
	nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */
	nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
	win-mask = <0x30>;
	nvidia,fb-win = <4>;
	nvidia,dc-connector = <&sor1>;
	nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
	vdd-dp-pwr-supply = <&p2888_spmic_sd0>;
	avdd-dp-pll-supply = <&p2888_spmic_sd1>;
	vdd_hdmi_5v0-supply = <&custom_board_hdmi_2_en>;
};


&sor0 {
	status = "okay";
	nvidia,active-panel = <&sor0_hdmi_display>;
};

&sor0_hdmi_display {
	status = "okay";
	disp-default-out {
		nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_HIGH>;
	};
};

&sor1 {
	status = "okay";
	nvidia,active-panel = <&sor1_hdmi_display>;
};

&sor1_hdmi_display {
	status = "okay";
	disp-default-out {
		nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_LOW>;
	};
};

&sor2 {
	status = "okay";
	nvidia,active-panel = <&sor2_hdmi_display>;
};

&sor2_hdmi_display {
	status = "okay";
	disp-default-out {
		nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_HIGH>;
	};
};

&dpaux0 {
	status = "okay";
};

&dpaux1 {
	status = "okay";
};

&dpaux2 {
	status = "okay";
};

&tegra_cec {
	status = "okay";
};

With the previous dtsi file I don’t get any output when connecting a display in SOR0.

After some more debugging I noticed this behavior:

In the devkit, if I only enable head0 (which is connected to SOR2), the hdmi interface works and I get this in the kernel log:

[   38.440330] edid invalid
[   38.463515] edid invalid
[   38.465700] edid invalid
[   38.613379] tegradc 15200000.nvdisplay: blank - powerdown
[   38.614583] tegradc 15200000.nvdisplay: unblank
[   38.617072] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[   38.617572] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[   38.635420] Parent Clock set for DC plld3
[   38.643279] tegradc 15200000.nvdisplay: hdmi: tmds rate:154000K prod-setting:prod_c_hdmi_111m_223m
[   38.645901] tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.
[   38.645908] tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.
[   38.650747] extcon-disp-state external-connection:disp-state: cable 48 state 1
[   38.650750] Extcon AUX2(HDMI) enable
[   38.650859] extcon-disp-state external-connection:disp-state: cable 40 state 1
[   38.650861] Extcon HDMI: HPD enabled
[   38.650907] tegradc 15200000.nvdisplay: hdmi: plugged
[   38.675485] tegradc 15200000.nvdisplay: blank - powerdown
[   38.729696] extcon-disp-state external-connection:disp-state: cable 48 state 0
[   38.729700] Extcon AUX2(HDMI) disable
[   38.755764] tegra_nvdisp_handle_pd_disable: Powergated Head1 pd
[   38.757192] tegra_nvdisp_handle_pd_disable: Powergated Head0 pd
[   38.800808] tegradc 15200000.nvdisplay: blank - powerdown
[   38.800852] tegradc 15200000.nvdisplay: unblank
[   38.802920] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[   38.803584] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[   38.814098] Parent Clock set for DC plld3
[   38.818705] tegradc 15200000.nvdisplay: hdmi: tmds rate:154000K prod-setting:prod_c_hdmi_111m_223m
[   38.819961] tegradc 15200000.nvdisplay: hdmi: get RGB quant from EDID.
[   38.819985] tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.
[   38.823763] extcon-disp-state external-connection:disp-state: cable 48 state 1
[   38.823765] Extcon AUX2(HDMI) enable
[   38.823853] tegradc 15200000.nvdisplay: unblank

However, in the custom board, if I only enable head1 (which is connected to SOR0), the hdmi interface does NOT work (don’t see anything in the screen, and it keeps inactive), and I get this in the kernel log:

[   37.865935] edid invalid
[   37.866938] edid invalid
[   37.899690] edid invalid
[   38.049966] tegradc 15210000.nvdisplay: blank - powerdown
[   38.050306] tegradc 15210000.nvdisplay: unblank
[   38.052673] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[   38.052738] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[   38.052784] tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
[   38.055430] Parent Clock set for DC pll_d
[   38.060329] tegradc 15210000.nvdisplay: hdmi: tmds rate:154000K prod-setting:prod_c_hdmi_111m_223m
[   38.061604] tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
[   38.061610] tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
[   38.065358] extcon-disp-state external-connection:disp-state: cable 46 state 1
[   38.065361] Extcon AUX0(HDMI) enable
[   38.065429] extcon-disp-state external-connection:disp-state: cable 40 state 1
[   38.065430] Extcon HDMI: HPD enabled
[   38.065448] tegradc 15210000.nvdisplay: hdmi: plugged
[   38.089348] tegradc 15210000.nvdisplay: blank - powerdown
[   38.145973] extcon-disp-state external-connection:disp-state: cable 46 state 0
[   38.145976] Extcon AUX0(HDMI) disable
[   38.172221] tegra_nvdisp_handle_pd_disable: Powergated Head2 pd
[   38.172420] tegra_nvdisp_handle_pd_disable: Powergated Head1 pd
[   38.173344] tegra_nvdisp_handle_pd_disable: Powergated Head0 pd
[   38.196126] tegradc 15210000.nvdisplay: blank - powerdown
[   38.196156] tegradc 15210000.nvdisplay: unblank
[   38.199058] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[   38.199165] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[   38.199259] tegra_nvdisp_handle_pd_enable: Unpowergated Head2 pd
[   38.200745] Parent Clock set for DC pll_d
[   38.206045] tegradc 15210000.nvdisplay: hdmi: tmds rate:154000K prod-setting:prod_c_hdmi_111m_223m
[   38.207302] tegradc 15210000.nvdisplay: hdmi: get RGB quant from EDID.
[   38.207322] tegradc 15210000.nvdisplay: hdmi: get YCC quant from EDID.
[   38.211012] extcon-disp-state external-connection:disp-state: cable 46 state 1
[   38.211015] Extcon AUX0(HDMI) enable
[   38.211111] tegradc 15210000.nvdisplay: unblank

The head0/head1 and SOR2/SOR0 have the same configuration… any idea why it keeps failing?

Actually you don’t need to remove “ucsi_ccg: ucsi_ccg@8” but only remove the “nvidia,typec-port = /bits/ 8 <0>;”

Hi. That device is not even present in the custom board, and here (https://devtalk.nvidia.com/default/topic/1044663/jetson-agx-xavier/how-the-enable-2nd-hdmi-port-with-the-xavier-/post/5325483/#5325483) it is mentioned to disable it. Is there any reason why we should keep this node even if the device is not present?

We don’t have the pull-up resistor attached to the gate port of the transistor that is controlled by the GPIO line “GPIO20_5V0_HDMI_EN”. Is this somehow relevant for the driver?

Finally, could you tell what should be the right values for the registers 0x02440030, 0x02440038 and 0x02440040? We want the three SOR to work in HDMI mode.

Disabling ucsi_ccg is okay. I meant you “don’t need to” but not “can’t remove it”.

For the hardware design, please follow up the OEM design guide. Also, please share current full log with me. Your log seems has no error.

Hi, here you have the complete log from the boot up. The screen is attached to SOR0, and corresponding regulator is “vdd-hdmi_2”. Thanks!
boot_log.txt (87.9 KB)

There is no kernel side error. Could you see the nvidia logo on screen during boot up?

According to the cboot log, cboot is able to read edid from your monitor and I believe kerenl can read it too.

sudo -s
cat /sys/kernel/debug/tegradc.X/edid

This debugfs could confirm my statement.

Could you try to manually unblank your monitor and try below commands?

sudo -s
echo 0 > /sys/class/graphics/fbX/blank (X= 0,1,2 depends on your head)
xinit

Hi

No, I can’t see the nvidia logo during boot up.

Yes!, it seems it has some edid info:

root@tegra-ubuntu:~#  cat /sys/kernel/debug/tegradc.0/edid 
 00 ff ff ff ff ff ff 00 22 0e 63 34 01 01 01 01
 0f 1c 01 03 80 34 20 78 2a c1 25 a8 55 4e a0 26
 0d 50 54 a1 08 00 b3 00 95 00 81 00 d1 c0 a9 c0
 81 c0 a9 40 81 80 28 3c 80 a0 70 b0 23 40 30 20
 36 00 06 44 21 00 00 1a 00 00 00 fd 00 32 3c 1e
 50 11 00 0a 20 20 20 20 20 20 00 00 00 fc 00 48
 50 20 45 32 34 33 69 0a 20 20 20 20 00 00 00 ff
 00 43 4e 4b 38 31 35 30 34 50 44 0a 20 20 01 50
 02 03 19 b1 49 10 1f 04 13 03 12 02 11 01 67 03
 0c 00 10 00 00 22 e2 00 2b 02 3a 80 18 71 38 2d
 40 58 2c 45 00 06 44 21 00 00 1e 02 3a 80 d0 72
 38 2d 40 10 2c 45 80 06 44 21 00 00 1e 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 5b

I have only the fb0 file in /sys/class/graphics/fb*, but I’m using head1 (the rest of heads are disabled in dev tree), and can’t see anything in the screen yet when running this:

root@tegra-ubuntu:~# echo 0 > /sys/class/graphics/fb0/blank
root@tegra-ubuntu:~# xinit

_XSERVTransSocketUNIXCreateListener: ...SocketCreateListener() failed
_XSERVTransMakeAllCOTSServerListeners: server already running
(EE) 
Fatal server error:
(EE) Cannot establish any listening sockets - Make sure an X server isn't already running(EE) 
(EE) 
Please consult the The X.Org Foundation support 
	 at http://wiki.x.org
 for help. 
(EE) Please also check the log file at "/var/log/Xorg.0.log" for additional information.
(EE) 
(EE) Server terminated with error (1). Closing log file.
No protocol specified
xinit: giving up
xinit: unable to connect to X server: Resource temporarily unavailable
xinit: server error

Looks like x server is already running on your device.

Are you able to see the power indicator be ON after unblank fb0?

Could you share the result of “lsmod”?

I forgot to ask you to change the pinmux setting from spreadsheet. You already changed it, didn’t you?

Is there any port that can work on your custom board now?

I don’t see the power indicator turning ON after unblank fb0, and the display only shows “No input signal”… BTW, if I am using head1, and the other heads are disabled, shouldn’t I see fb1 instead?

This is the result of “lsmod”:

xavier@tegra-ubuntu:~$ lsmod
Module                  Size  Used by
fuse                  120387  3
overlay                54471  0
binfmt_misc            14602  1
nvgpu                1706058  20
bluedroid_pm           16251  0
ip_tables              21170  0
x_tables               38144  1 ip_tables

Which change do you mean?

  1. If you look into the pinmux spreadsheet, you will find the DP and HDMI have different configuration. Please make sure you align all HDMI pins in same setting.

  2. Is there any port that can work on your custom board now?
    Please also reply this question. I think the better way to verify your hardware design is to use the default HDMI configuration as devkit. Then, after you confirm it is working, align the same configuration on other ports.

  3. If the monitor does not go into powerdown(it shows “No input signal”, which means no powerdown but just nothing received), it means driver does not think it is disconnected.

  4. nvgpu exists. No problem in this part.

Hi,

In the pinmux spreadsheet, for the signals “HDMI_DPX_TXDPX” I just kept the same pinmuxing option as it was by default, since the other option available was “unsed_HD”…

Regarding the rest of th epins:

  • CEC pin works as HDMI_CEC
  • HPD pins work as DP_AUX_CHX_HPD
  • For the SCL and DAT signals I have tried both DP_AUX_CHX_P and I2C but it doesn't make any differnece in the generated dtsi files. I also saw in the hdmi2.0 driver that it already configures the pinmux to I2C anyway

We cannot test the other ports due to some HW issues… But we are on it.

Well, it shows the “No input signal” and after a while the screen turns off… But I also think the driver doesn’t think it is disconnected as it shows the message “plugged”, and only shows “unplugged” when disconnected the hdmi cable.

Please go ahead with “fb0: Head0->SOR2->HDMI” because it is verified working on devkit.

If it does not work on your board, then maybe need to review the hardware design.

We’ll do!

Btw, is there any register for the SORs that could help us to see if there any problem in the HDMI lanes such as incorrect termination…? I mean, some registers that allows us to know if we have problems because of the hardware. That way we may know if there is still a misconfiguration in the SW.

Thanks!

Yes,

sudo -s
cd /sys/kernel/debug/tegra_sorX/
cat regs

Hi WayneWWW,

thanks for that.

I will put here again the configuration we have:

fb0: Head0->SOR2->HDMI
fb1: Head1->SOR0->HDMI
fb2: Head2->SOR1->HDMI

We left SOR2 and SOR1 unplugged (i.e. not screen attached) and plug a screen in SOR0. However, if we do a reboot we see that the kernel disable the regulators of Head1 and Head2, and only keep Head0 enabled, even if there is not screen there (and there is in SOR0). Do you have any idea why this could happen? We tried to remove the GPIO enable signal for SOR0 and enable it manually via sys interface, but even with that we don’t get any output.

Thanks

Hi WayneWWW,

could you please tell us a way to set the screen mode (resolution, refresh rate, bit depth) like manually? through some cmdline parameter maybe?

Thanks