How to enable DP port in xavier AGX L4T32.4.3

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

Hi, I want to build from source L4T32.4.3, here I want to enable Display port DP on HDMI0 and keep HDMI as it is in HDMI2. Which dtsi file I need to edit and what needs to change?

  • fb0: Head0->SOR2->HDMI // Make as DP
  • fb1: Head1->SOR0->DP0
  • fb2: Head2->SOR1->DP1// Make as HDMI
    file: (hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2822-disp.dtsi)

Does this is correct? anything needs to be changed?

&head0 {
status = “okay”;
nvidia,fb-bpp = <32>;
nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered /
nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
win-mask = <0x3>;
nvidia,fb-win = <0>;
nvidia,dc-connector = <&sor2>;
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
avdd_hdmi-supply = <&p2888_spmic_sd0>; / 1v0 /
avdd_hdmi_pll-supply = <&p2888_spmic_sd1>; / 1v8 /
vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>; / 5v0 */
};

&head1 {
status = “okay”;
nvidia,fb-bpp = <32>;
nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */
nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
win-mask = <0xC>;
nvidia,fb-win = <2>;
nvidia,dc-connector = <&sor0>;
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
vdd-dp-pwr-supply = <&p2888_spmic_sd0>;
avdd-dp-pll-supply = <&p2888_spmic_sd1>;
vdd-edp-sec-mode-supply = <&battery_reg>;
vdd-dp-pad-supply = <&battery_reg>;
vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>;
};

&head2 {
status = “okay”;
nvidia,fb-bpp = <32>;
nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered */
nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
win-mask = <0x30>;
nvidia,fb-win = <4>;
nvidia,dc-connector = <&sor1>;
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
vdd-dp-pwr-supply = <&p2888_spmic_sd0>;
avdd-dp-pll-supply = <&p2888_spmic_sd1>;
vdd-edp-sec-mode-supply = <&battery_reg>;
vdd-dp-pad-supply = <&battery_reg>;
vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>;
};

&sor0 {
status = “okay”;
nvidia,active-panel = <&sor0_dp_display>;
};

&sor0_dp_display {
status = “okay”;
nvidia,is_ext_dp_panel = <1>;
};

&sor1 {
status = “okay”;
nvidia,active-panel = <&sor1_hdmi_display>;
};

&sor1_hdmi_display {
status = “okay”;
nvidia,is_ext_dp_panel = <1>;
};

&sor2 {
status = “okay”;
nvidia,active-panel = <&sor2_dp_display>;
};

&sor2_dp_display {
status = “okay”;
disp-default-out {
nvidia,out-flags = <TEGRA_DC_OUT_HOTPLUG_LOW>;
};
};

&dpaux0 {
status = “okay”;
};

&dpaux1 {
status = “okay”;
};

&dpaux2 {
status = “okay”;
};

&tegra_cec {
status = “okay”;
};

3

Hi,

I want to enable Display port DP on HDMI0 and keep HDMI as it is in HDMI2.

I don’t pretty sure your purpose here. Your mapping is just same as default setting on Xavier devkit.
Why does your dts change include HDMI1? Are you sure your description match your dts change?

If your mapping is same as devkit, then you don’t need to change this part. Just remove below node from your sor0 and sor1 if you do not want to use type C port but native DP port.

nvidia,typec-port = /bits/ 8 <0>;

4

Hi Thank you, I am not sure where to change.

My requirements are as below:

Head0->SOR2->HDMI // Make it as DP
Head1->SOR0->DP0// keep as is
Head2->SOR1->DP1// Make it as HDMI

Please help.

5

Hello,

There is no trick for this. Just copy our existing setting from default dts and move it to match your goal. For example, you want to enable HDMI on SOR1 now, then follow our original dts to write HDMI node under SOR1 and disable the old DP setting.

Also, debug the port one by one but not enable them altogether.

6

Ok, I need to make similar settings as in DP in original dts if I want to Original HDMI to DP right?
Say if I want SOR2 to be DP then I need to make similar changes as SOR0 or SOR1 settings to SOR2 correct?

7

And I have another doubt, how to map these heads or SORs to the actual Hardware ports?

8

Yes, that is correct.

And SORx is mapping to the hardware port directly.

Means SOR0 is HDMI_DP0
SOR1 is HDMI_DP1
SOR2 is HDMI_DP2

9

thanks a lot, will get back if any further doubt

1 Like
10

I need to change in mapped heads also right? like if i changed SOR1 then need to make appropriate change in head2 also?

11

No, you don’t need to change the mapping on head (nvdisplay). It has no difference what SOR is linked to it.

12

I mean to say , this portion of dtsi: do I need to change here as well?
&head0 {
status = “okay”;
nvidia,fb-bpp = <32>;
nvidia,fbmem-size = <265420800>; /* 8K (7680*4320) 32bpp double buffered /
nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
win-mask = <0x3>;
nvidia,fb-win = <0>;
nvidia,dc-connector = <&sor2>;
nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
avdd_hdmi-supply = <&p2888_spmic_sd0>; / 1v0 /
avdd_hdmi_pll-supply = <&p2888_spmic_sd1>; / 1v8 /
vdd_hdmi_5v0-supply = <&p2822_vdd_hdmi_5v0>; / 5v0 */
};

13

  1. If this head is going to be changed to another function. For example, DP-> HDMI, then please add the corresponding power supply to it.

  2. If this port is still the same function, still make sure these power supplies are using the correct source/gpio.

  3. If some power source is always-on, set it as &battery_reg, which is a dummy regulator.

14

ok, thank you

15

hey which file I need to change this?

16

Directly grep this line in your all dts folder and you will find it.

17

got it thank you:
hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0001-p2822-0000-common.dtsi: nvidia,typec-port = /bits/ 8 <0>;

1 Like
18

Hi, got another query for this display port,
Can we make the DisplayPort working without EDID, and also how to disable HPD control? can we control it by making a GPIO?

19

Hi,

  1. We must read and EDID from your monitor. If there is no edid from it, our driver will use a fake /hardcoded value. This mode may not work on your monitor.

  2. Sorry that only HDMI in our driver would use gpio to detect hpd. The Displayport is using dpaux.

20

hey, is there any way to bypass the EDID reading and enable display(dp) port by default.
currently it is going to power down state.

21

Try to enable the “use_fallback” in edid.c and see if it can run.