Custom carrier USB3 not working

We have a custom board for the TX2 to run on. It doesn’t have any PCI interfaces but does have two USB ports.

The same micro USB2 OTG port (used for flashing and keyboard + mouse) as the nvidia dev board. This works fine.

We also have a USB3 port, that is connected to the same module pins as the dev board:

A38 D+
A39 D-
C43 TX+
C44 TX-
F43 RX+
F44 Rx-

This port also works fine if I plug in a USB1/2 device, a mouse for example, though I’m confused by its location in this tree:

nvidia@tegra-ubuntu:~$ lsusb -t
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/3p, 5000M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/4p, 480M
    |__ Port 1: Dev 2, If 0, Class=Human Interface Device, Driver=usbhid, 12M
    |__ Port 1: Dev 2, If 1, Class=Human Interface Device, Driver=usbhid, 12M
    |__ Port 2: Dev 4, If 0, Class=Human Interface Device, Driver=usbhid, 1.5M <b><-- mouse in the USB3</b> port

If I plug in a USB3 only SSD, the device doesn’t connect, but I get dmesg logs:

[  727.524866] xhci-tegra 3530000.xhci: tegra_xhci_mbox_work mailbox command 4
[  727.531931] xhci-tegra 3530000.xhci: tegra_xhci_mbox_work ignore firmware MBOX_CMD_INC_SSPI_CLOCK request

I also see “command 5” logs alternating with repeats of the above (device retrying?).

We don’t have an EEPROM, so I’ve removed the plugin manager from the device tree. The remaining relevant parts of the device tree are:

xhci@3530000 {
		reg = <0x0 0x3530000 0x0 0x8000 0x0 0x3538000 0x0 0x1000>;
		phys = <&tegra_xusb_padctl 0x10 &tegra_xusb_padctl 0x11 &tegra_xusb_padctl 0x12 &tegra_xusb_padctl 0x0>;
		interrupts = <0x0 0xa3 0x4 0x0 0xa7 0x4>;
		avddio_usb-supply = <0xf>;
		otg-controller = <0x9b>;
		compatible = "nvidia,tegra186-xhci";
		clock-names = "host", "falcon_src", "ss", "ss_src", "hs_src", "fs_src", "pll_u_480M", "clk_m", "pll_e";
		nvidia,boost_cpu_freq = <0x320>;
		phy-names = "utmi-0", "utmi-1", "utmi-2", "usb3-0";
		clocks = <0xd 0x71 0xd 0xf4 0xd 0x72 0xd 0xf2 0xd 0x27c 0xd 0xf5 0xd 0x215 0xd 0x261 0xd 0x200>;
		mboxes = <0x9a>;
		status = "okay";
		phandle = <0x73>;
		avdd_pll_utmip-supply = <0xe>;
		#stream-id-cells = <0x1>;
		hvdd_usb-supply = <0xe>;
		mbox-names = "xusb";
		linux,phandle = <0x73>;
		interrupt-parent = <0x2d>;
	};
tegra_xusb_padctl: pinctrl@3520000 {
		reg = <0x0 0x3520000 0x0 0x1000 0x0 0x3540000 0x0 0x1000>;
		interrupts = <0x0 0xa7 0x4>;
		vbus-2-supply = <&vcc_pullup>;
		pinctrl-0 = <0xa0>;
		pinctrl-1 = <0xa1>;
		pinctrl-2 = <0xa2>;
		pinctrl-3 = <0xa3>;
		pinctrl-4 = <0xa4>;
		pinctrl-5 = <0xa5>;
		pinctrl-6 = <0xa6>;
		reg-names = "padctl", "ao";
		compatible = "nvidia,tegra186-xusb-padctl";
		clock-names = "xusb_clk", "utmipll", "usb2_trk", "hsic_trk";
		#phy-cells = <0x1>;
		reset-names = "padctl_rst";
		vddio-hsic-supply = <&vcc_pullup>;
		vclamp_usb-supply = <0xe>;
		clocks = <0xd 0x6f 0xd 0x215 0xd 0x87 0xd 0x86>;
		vbus-1-supply = <0x9e>;
		mboxes = <0x9a>;
		resets = <0xd 0x37>;
		vbus-3-supply = <&vdd_usb2_5v>;
		status = "okay";
		avdd_pll_erefeut-supply = <0xe>;
		avdd_usb-supply = <0xf>;
		phandle = <0x98>;
		vbus-0-supply = <0x9d>;
		mbox-names = "xusb";
		pinctrl-names = "default", "vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate", "vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough", "vbus_en0_default", "vbus_en1_default";
		linux,phandle = <0x98>;

		prod-settings {
			#prod-cells = <0x4>;

			prod_c_hsic0 {
				prod = <0x0 0x344 0x7f 0x2d>;
			};

			prod_c_utmi0 {
				prod = <0x0 0x88 0x1fe0000 0xcc0000>;
			};

			prod_c_utmi1 {
				prod = <0x0 0xc8 0x1fe0000 0xcc0000>;
			};

			prod_c_utmi2 {
				prod = <0x0 0x108 0x1fe0000 0xcc0000>;
			};

			prod_c_ss0 {
				prod = <0x0 0x14 0xf7ffffff 0x1010002 0x0 0x14 0xf7ffffff 0x1040032 0x0 0x14 0xf7ffffff 0x1070022 0x0 0x14 0xf7ffffff 0x1352587 0x0 0x14 0xf7ffffff 0x1490fc7 0x0 0x14 0xf7ffffff 0x1520001 0x0 0x14 0xf7ffffff 0x1533c0f 0x0 0x14 0xf7ffffff 0x156c00f 0x0 0x14 0xf7ffffff 0x15dff07 0x0 0x14 0xf7ffffff 0x15e141a>;
			};

			prod_c_ss1 {
				prod = <0x1 0x14 0xf7ffffff 0x1010002 0x1 0x14 0xf7ffffff 0x1040032 0x1 0x14 0xf7ffffff 0x1070022 0x1 0x14 0xf7ffffff 0x1352587 0x1 0x14 0xf7ffffff 0x1490fc7 0x1 0x14 0xf7ffffff 0x1520001 0x1 0x14 0xf7ffffff 0x1533c0f 0x1 0x14 0xf7ffffff 0x156c00f 0x1 0x14 0xf7ffffff 0x15dff07 0x1 0x14 0xf7ffffff 0x15e141a>;
			};

			prod_c_ss2 {
				prod = <0x2 0x14 0xf7ffffff 0x1010002 0x2 0x14 0xf7ffffff 0x1040032 0x2 0x14 0xf7ffffff 0x1070022 0x2 0x14 0xf7ffffff 0x1352587 0x2 0x14 0xf7ffffff 0x1490fc7 0x2 0x14 0xf7ffffff 0x1520001 0x2 0x14 0xf7ffffff 0x1533c0f 0x2 0x14 0xf7ffffff 0x156c00f 0x2 0x14 0xf7ffffff 0x15dff07 0x2 0x14 0xf7ffffff 0x15e141a>;
			};

			prod_c_bias {
				prod = <0x0 0x284 0x38 0x38>;
			};
		};

		pinmux {
			phandle = <0xa0>;
			linux,phandle = <0xa0>;

			usb2-std-A-port2 {
				nvidia,function = "xusb";
				nvidia,lanes = "otg-1";
				nvidia,port-cap = <0x1>;
				nvidia,oc-pin = <0x1>;
			};

			usb3-std-A-port2 {
				nvidia,lanes = "usb3-0";
				nvidia,port-cap = <0x1>;
				nvidia,oc-pin = <0x1>;
			};

			e3325-usb3-std-A-HS {
				nvidia,function = "xusb";
				nvidia,lanes = "otg-2";
				nvidia,port-cap = <0x1>;
				status = "okay";
			};

			e3325-usb3-std-A-SS {
				nvidia,lanes = "usb3-0";
				nvidia,port-cap = <0x1>;
                                status = "okay";
			};

			usb2-micro-AB {
				nvidia,function = "xusb";
				nvidia,lanes = "otg-0";
				nvidia,port-cap = <0x3>;
				nvidia,oc-pin = <0x0>;
			};
		};
	};
e3325_lane0_mux {
			gpios = <0xc 0x0>;
			label = "e3325-lane0-mux";
			output-low;
			status = "okay";
			gpio-hog;
		};

Is this tree appropriate? I’ve “disabled” all the pci@ interfaces, since we don’t have any PCI.

I’m running out of ideas now. Does the above suggest anything I’ve missed or need to check?

Many Thanks.

do you use some generic manufacture custom carrier board or even more custom?
because manufacturers of custom carrier boards for example like connecttech do have some specific patches for the purpose, as it seems to me

This board is our own design, so patches are mainly down to me :)

The basic design follows the TX2 dev board, but we have to prove out the hardware at the same time as developing the software of course.

Please refer to
https://elinux.org/Jetson/TX2_USB

An example:
https://devtalk.nvidia.com/default/topic/1030635/jetson-tx2/tx2-config-4-for-usb-lane-mapping/post/5243174/#5243174