Hi WayneWWW,
Thanks for update. (The wiki page is for config#3 not config#4)
I try to find the rules by config#3 but still have some problems.
On our custom board, we will use the following interfaces
-
USB hub bridge over PCIe
“PEX0”(A44, A45, H44, H45, E44, E45)
-
USB2.0
2.1 USB1_D (A38, A39)
2.2 USB2_D(B42, B43)
-
USB3.0
3.1 “USB_SS0” (F43, F44, C43, C44)
3.2 “USB_SS1” (G43, G44, D43, D44)
For those usage, I think I need to config USB Lane Mapping to #4 (one PCIe lane and two USB3.0 including USB_SS0)
I try to add the followings into “tegra186-quill-p3310-1000-a00-00-base.dts” and “tegra186-quill-p3310-1000-c03-00-base.dts”
xhci@3530000 {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(2)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(2)>;
phy-names = "utmi-0", "utmi-1", "usb3-1", "utmi-2","usb3-0", "usb3-2";
nvidia,boost_cpu_freq = <800>;
};
gpio@2200000 {
sdmmc-wake-support-input {
status = "okay";
};
sdmmc-wake-support-output {
status = "okay";
};
pcie0_lane2_mux {
status = "okay"; //This is for switch usb3.0 on M.2 to PCIe.
};
};
pinctrl@3520000 {
pinmux {
usb3-std-A-port2 {
nvidia,lanes = "usb3-0
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};
usb3-std-A-port3 {
nvidia,lanes = "usb3-2";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "okay";
};
e3325-usb3-std-A-HS {
status = "okay"; //This is usb2.0 port on M.2
};
};
};
BUS 04: “USB_SS0” (F43, F44, C43, C44)
Bus 03: usb 2.0
Bus 02: not sure
Bus 01: PCIe-USB
“USB_SS1” (G43, G44, D43, D44) seems not work.
nvidia@tegra-ubuntu:~$ lsusb -t
/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/3p, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-tegra/4p, 480M
|__ Port 1: Dev 3, If 0, Class=Audio, Driver=snd-usb-audio, 12M
|__ Port 1: Dev 3, If 1, Class=Audio, Driver=snd-usb-audio, 12M
|__ Port 1: Dev 3, If 2, Class=Human Interface Device, Driver=usbhid, 12M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 480M
If I also add those modification into tegra186-quill-p3310-1000-a00-plugin-manager.dtsi and comment out conflict parts. The USB status are as below.
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 480M
This thread is close what I need but PCIe setting has error and “USB_SS1” (G43, G44, D43, D44) can’t work.
https://devtalk.nvidia.com/default/topic/1007448/jetson-tx2/differences-between-tx2-module-revisions/1