SoftVersion: JetPacl_5.1.3 ubuntu2004
chip module: Jetson orin NX 16G
Hardware: I2S2 and I2c1 connect to es8388.
schematic diagram:
Pin multiplexing configuration:
cat /sys/kernel/debug/pinctrl/2430000.pinmux/pinconf-groups >pin.txt
pin.txt (39.3 KB)
Should my pin multiplexing configuration be okay?Please help me analyze it.
The device tree configuration is as follows:
/ {
aconnect@2a41000 {
status = "okay";
tegra_agic:agic-controller@2a41000 {
status = "okay";
};
adsp@2993000 {
status = "okay";
};
ahub{
status = "okay";
i2s@2901100{
status = "okay";
};
};
};
tegra_acsl_audio: acsl_audio {
status = "okay";
};
i2c@3160000 {
status = "okay";
es8388: es8388@11 {
compatible = "everest,es8388";
status = "okay";
reg = <0x11>;
#sound-dai-cells = <0>;
sound-name-prefix = "CVB-RT";
clocks = <&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
clock-parents = <&bpmp_clks TEGRA234_CLK_PLLA_OUT0>;
clock-names = "mclk";
port {
es8388_ep: endpoint {
remote-endpoint = <&i2s2_dap_ep>;
mclk-fs = <256>;
link-name = "es8388-playback";
};
};
};
};
tegra_sound: sound {
status = "okay";
// fixed-pll;
compatible = "nvidia,tegra186-ape";
nvidia-audio-card,name = "es8388-tegra";
clocks = <&bpmp_clks TEGRA234_CLK_PLLA>,
<&bpmp_clks TEGRA234_CLK_PLLA_OUT0>,
<&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
clock-names = "pll_a", "pll_a_out0", "extern1";
nvidia,aud-mclk-always-on;
assigned-clocks = <&bpmp_clks TEGRA234_CLK_PLLA_OUT0>,
<&bpmp_clks TEGRA234_CLK_AUD_MCLK>;
assigned-clock-parents = <&bpmp_clks TEGRA234_CLK_PLLA>,
<&bpmp_clks TEGRA234_CLK_PLLA_OUT0>;
assigned-clock-rates = <361280000>,
<361280000>,
<0>;
nvidia-audio-card,widgets =
"Headphone", "CVB-RT Headphone Jack",
"Microphone", "CVB-RT Mic Jack";
nvidia-audio-card,routing =
"CVB-RT Headphone Jack", "CVB-RT LOUT1",
"CVB-RT Headphone Jack", "CVB-RT ROUT1",
"CVB-RT LINPUT1", "CVB-RT Mic Jack",
"CVB-RT RINPUT1", "CVB-RT Mic Jack";
nvidia-audio-card,mclk-fs = <256>;
};
};
hdr40_snd_link_i2s: &i2s2_to_codec {
link-name = "es8388-playback";
status = "okay";
// bitclock-master;
// frame-master;
codec {
sound-dai = <&es8388 0>;
prefix = "CVB-RT";
};
};
/* Audio graph related bindings */
hdr40_snd_i2s_dap_ep: &i2s2_dap_ep {
status = "okay";
remote-endpoint = <&es8388_ep>;
};
sudo dtc -I fs -O dts -o dt.dts /proc/device-tree
dt.dts.txt (410.0 KB)
Source code modification:
Linux_for_Tegra/source/public/kernel/kernel5.10/sound/soc/tegra/tegra_codecs.c
static int tegra_machine_es8388_init(struct snd_soc_pcm_runtime *rtd)
{
struct device *dev = rtd->card->dev;
int err;
printk("\n/*** tegra_machine_es8388_init 1 ***/\n");
err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus], 0, 12288000,
SND_SOC_CLOCK_IN);
if (err) {
dev_err(dev, "failed to set es8388 sysclk!\n");
return err;
}
printk("\n/*** tegra_machine_es8388_init ok ***/\n");
return tegra_audio_dai_init(rtd);
}
//in int tegra_codecs_runtime_setup(struct snd_soc_card *card,
/* DAI link-name "es8388-playback" specified in DT */
rtd = get_pcm_runtime(card, "es8388-playback");
if (rtd) {
#if 0
unsigned int bclk_rate;
struct snd_soc_pcm_stream *dai_params;
dai_params = (struct snd_soc_pcm_stream *)rtd->dai_link->params;
/* Calculate BCLK rate depending on the stream rate, channels and bits */
switch (dai_params->formats) {
case SNDRV_PCM_FMTBIT_S8:
bclk_rate = srate * channels * 8;
break;
case SNDRV_PCM_FMTBIT_S16_LE:
bclk_rate = srate * channels * 16;
break;
case SNDRV_PCM_FMTBIT_S32_LE:
bclk_rate = srate * channels * 32;
break;
default:
printk("\n/*** dai_params no ***/\n");
return -EINVAL;
}
printk("\n/*** srate=%d channels = %d bclk_rate = %d num_cpus = %d BCLK1 = %d PLL1 = %d ***/\n",srate, channels, bclk_rate,rtd->num_cpus, RT5659_PLL1_S_BCLK1,RT5659_SCLK_S_PLL1);
/* Set codec DAI PLL */
err = snd_soc_dai_set_pll(rtd->dais[rtd->num_cpus],0,0,bclk_rate,srate * 256);
if(err < 0)
return err;
/* Set SYSCLK */
err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus], RT5659_SCLK_S_PLL1, srate * 256, SND_SOC_CLOCK_IN);
if (err < 0)
return err;
#else
printk("\n/*** snd_soc_dai_set_sysclk 1 ***/\n");
err = snd_soc_dai_set_sysclk(rtd->dais[rtd->num_cpus],
RT5640_SCLK_S_MCLK,
aud_mclk, SND_SOC_CLOCK_IN);
if (err < 0) {
dev_err(card->dev, "dais[%d] clock not set\n",
rtd->num_cpus);
return err;
}
#endif
printk("\n/*** snd_soc_dai_set_sysclk 2 ***/\n");
}
//in int tegra_codecs_init(struct snd_soc_card *card)
else if (strstr(dai_links[i].name, "fe-pi-audio-z-v2"))
dai_links[i].init = tegra_machine_fepi_init;
else if (strstr(dai_links[i].name, "respeaker-4-mic-array"))
dai_links[i].init = tegra_machine_respeaker_init;
else if (strstr(dai_links[i].name, "es8388-playback"))
dai_links[i].init = tegra_machine_es8388_init;
in tegra_defconfig add:
CONFIG_SND_SOC_ES8328=y
CONFIG_SND_SOC_ES8328_I2C=y
log:
There is no sound during playback
I can see that the clock has been enabled, but when I actually measure it with an oscilloscope, I find that there is no actual clock on the line.
Is there anything else that I haven’t configured correctly?
Please help me solve this problem
Thank you
