Please check if vi initial well.
[ 2.593680] vi 54080000.vi: vi_probe: ++
[ 2.596488] vi 54080000.vi: initialized
yes the VI initialized well
[ 1.472018] vi 54080000.vi: vi_probe: ++
[ 1.474519] vi 54080000.vi: initialized
[ 1.476477] vi 54080000.vi: subdev nvcsi–2 bound
[ 1.476578] vi 54080000.vi: subdev nvcsi–1 bound
Why the i2c6 and i2c7 got collapsed in the generated dts file
The symbols has the below
i2c7 = “/host1x/i2c@546c0000”;
i2c6 = “/i2c@7000d100”;
but in aliases block
aliases {
sdhci0 = “/sdhci@700b0000”;
sdhci1 = “/sdhci@700b0200”;
sdhci2 = “/sdhci@700b0400”;
sdhci3 = “/sdhci@700b0600”;
i2c0 = “/i2c@7000c000”;
i2c1 = “/i2c@7000c400”;
i2c2 = “/i2c@7000c500”;
i2c3 = “/i2c@7000c700”;
i2c4 = “/i2c@7000d000”;
i2c5 = “/i2c@7000d100”;
i2c6 = “/host1x/i2c@546c0000”;
spi0 = “/spi@7000d400”;
spi1 = “/spi@7000d600”;
spi2 = “/spi@7000d800”;
spi3 = “/spi@7000da00”;
qspi6 = “/spi@70410000”;
serial0 = “/serial@70006000”;
serial1 = “/serial@70006040”;
serial2 = “/serial@70006200”;
serial3 = “/serial@70006300”;
rtc0 = “/i2c@7000d000/max77620@3c”;
rtc1 = “/rtc”;
};
here is the dtb dumped file
extrcted.dts (334.6 KB)
The string in the symbols__ should be just string could be some mistake during device tree compile suppose able to ignore it. You can move to another i2c to clarify due to your device didn’t really need i2c access you can move to any of them.
Yes I understood it.
have you checked the ports and channel is all correct ??
Remove below from your device tree.
vi_base {
ports {
vi_port0 {
status = "disabled";
endpoint {
status = "disabled";
linux,phandle = <0x11c>;
phandle = <0x11c>;
};
};
vi_port1 {
status = "disabled";
endpoint {
status = "disabled";
linux,phandle = <0x11d>;
phandle = <0x11d>;
};
};
};
};
csi_base {
csi_chan0 {
status = "disabled";
ports {
csi_chan0_port0 {
status = "disabled";
endpoint@0 {
status = "disabled";
linux,phandle = <0x11e>;
phandle = <0x11e>;
};
};
csi_chan0_port1 {
status = "disabled";
endpoint@1 {
status = "disabled";
linux,phandle = <0x11f>;
phandle = <0x11f>;
};
};
};
};
csi_chan1 {
status = "disabled";
ports {
csi_chan1_port0 {
status = "disabled";
endpoint@2 {
status = "disabled";
linux,phandle = <0x120>;
phandle = <0x120>;
};
};
csi_chan1_port1 {
status = "disabled";
endpoint@3 {
status = "disabled";
linux,phandle = <0x121>;
phandle = <0x121>;
};
};
};
};
};
};
Sorry, you mean to add these part to disable those ports and chennals ??
I so those context in previous device tree dump.
Remove those context to try.
yes you are correct it is there. but i have given status= okay in my camera dtsi still it didn’t affected here.
then how i should i remove this
should i comment here and re-compile this dts file ?
I found it on this below file only all those things were disabled
tegra210-porg-camera.dtsi
/ {
tegra-camera-platform {
compatible = “nvidia, tegra-camera-platform”;
modules {
cam_module0: module0 {
status = "disabled";
cam_module0_drivernode0: drivernode0 {
status = "disabled";
};
cam_module0_drivernode1: drivernode1 {
status = "disabled";
pcl_id = "v4l2_lens";
};
};
cam_module1: module1 {
status = "disabled";
cam_module1_drivernode0: drivernode0 {
status = "disabled";
};
cam_module1_drivernode1: drivernode1 {
status = "disabled";
pcl_id = "v4l2_lens";
};
};
};
};
/* all vi and csi ports are disabled by default */
host1x {
vi_base {
ports {
vi_port0 {
status = "disabled";
vi_in0: endpoint {
status = "disabled";
};
};
vi_port1 {
status = "disabled";
vi_in1: endpoint {
status = "disabled";
};
};
};
};
csi_base{
csi_chan0 {
status = "disabled";
ports {
csi_chan0_port0 {
status = "disabled";
csi_in0: endpoint@0 {
status = "disabled";
};
};
csi_chan0_port1 {
status = "disabled";
csi_out0: endpoint@1 {
status = "disabled";
};
};
};
};
csi_chan1 {
status = "disabled";
ports {
csi_chan1_port0 {
status = "disabled";
csi_in1: endpoint@2 {
status = "disabled";
};
};
csi_chan1_port1 {
status = "disabled";
csi_out1: endpoint@3 {
status = "disabled";
};
};
};
};
};
};
};
To resolve this issue (enabling the VI and CSI). I tried removing this part in
tegra210-porg-camera.dtsi
but those part got removed and didn’t updated with our camera dtsi properties. there is not even Vi_base and Csi_base blocks
I’m compiling the dts files using
make -j4 dtbs command
Hello @ShaneCCC
we got the video Dev node successfully.
i’ll summerize the process which we did in this thread end
I’m getting some of issues while getting the video frames do i need to create another thread ??
- In our Custom carrier board version we don’t have usb control(mouse keyboard), so we aren’t possible to unlock the screen. did the screen should be unlocked for testing using gstreamer commands ??
========================================================
- I have tested with the below command
v4l2-ctl --set-fmt-video=width=1920,height=1080,pixelformat=yuv --stream-mmap -d /dev/video0 --set-ctrl bypass_mode=0 --stream-count=3 --stream-to=Vid.raw
S.1) Sometimes this is giving frames and sometimes it is waiting there only not giving any frames.
S.2) All the time whenever i give this v4l2-ctl or gstreamer command the camera getting reset mean the camera lens is getting initialized. i think it is turning off and turning on i got to know by the kernel message
S.3) I’m getting the below Error in kernel logs while running the v4l2-ctl command.
========================================================
This is my running driver
ev9500m.c (13.2 KB)
ev9500m 6-0010: ev9500m_power_on: power on
[ 99.113907] ev9500m 6-0010: ev9500m_power_off: power off
[ 99.114331] ev9500m 6-0010: ev9500m_power_on: power on
[ 99.345890] video4linux video0: frame start syncpt timeout!0
[ 99.553982] video4linux video0: frame start syncpt timeout!0
[ 99.761973] video4linux video0: frame start syncpt timeout!0
[ 99.970209] video4linux video0: frame start syncpt timeout!0
[ 100.177618] video4linux video0: frame start syncpt timeout!0
[ 100.386201] video4linux video0: frame start syncpt timeout!0
[ 100.593938] video4linux video0: frame start syncpt timeout!0
[ 100.801946] video4linux video0: frame start syncpt timeout!0
[ 101.010068] video4linux video0: frame start syncpt timeout!0
[ 101.218196] video4linux video0: frame start syncpt timeout!0
[ 101.426181] video4linux video0: frame start syncpt timeout!0
[ 101.633888] video4linux video0: frame start syncpt timeout!0
[ 101.841947] video4linux video0: frame start syncpt timeout!0
[ 102.049920] video4linux video0: frame start syncpt timeout!0
[ 102.257930] video4linux video0: frame start syncpt timeout!0
[ 102.300930] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 15
[ 102.317451] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 16
[ 102.351237] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 17
[ 102.384533] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 18
[ 102.417929] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 19
[ 102.451262] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 20
[ 102.484552] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 21
[ 102.517914] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 22
[ 102.551232] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 23
[ 102.584558] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 24
[ 102.617948] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 25
[ 102.651249] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 26
[ 102.684572] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 27
[ 102.717988] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 28
[ 102.751236] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 29
[ 102.784580] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 30
[ 102.817910] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 31
[ 102.850868] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 32
[ 102.884525] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 33
[ 102.918216] vi 54080000.vi: tegra_channel_error_status:error 4000 frame 34
Try configure the sensor output as discontinuous clocks to check.
Actully it is already enabled Mr @ShaneCCC
mode0{ //1920x1080_60Fps
mclk_khz = “24000”;
set_mode_delay_ms = “5000”;
num_lanes = “4”;
tegra_sinterface = “serial_a”;
vc_id = “0”;
phy_mode = “DPHY”;
discontinuous_clk = “yes”;
dpcm_enable = “false”;
cil_settletime = “0”;
active_w = “1920”;
active_h = “1080”;
//mode_type = “rgb”;
//pixel_phase = “rgb888”;
//csi_pixel_bit_depth = “24”;
mode_type = “yuv”;
pixel_phase = “uyvy”;
Need program the sensor output as discontinuous clocks mode instead just modify the dts.
I’m not getting what do mean can you please explain bit in detail
Sensor able to support continuous/discontinuous clocks by REG config.
Please consult with sensor vendor to get the REG configuration for it.
My Camera Doesn’t have i2c, i won’t be possible write any REG values to the camera.
Can you please check my CLOCK configuration
host1x {
i2c@546c0000 {
status = “okay”;
#address-cells = <1>;
#size-cells = <0>;
ev9500m_cam0: ev9500m_a@10 {
status = “okay”;
compatible = “ev9500m”;
/* I2C device address /
reg = <0x10>;
/ V4L2 device node location /
devnode = “video0”;
/ Physical dimensions of sensor /
physical_w = “3.674”;
physical_h = “2.738”;
sensor_model = “ev9500m”;
/ Define any required hw resources needed by driver /
/ ie. clocks, io pins, power sources /
/ mclk-index indicates the index of the /
/ mclk-name with in the clock-names array */
//avdd-reg = “vana”;
//iovdd-reg = “vif”;
//dvdd-reg = “vdig”;
//vana-supply = <&p3509_avdd_cam_2v8>;
// vif-supply = <&p3509_vdd_1v8_cvb>;
//vana-supply = <&p3509_vdd_3v3_cvb>;
//vdig-supply = <&p3509_vdd_sys_en>;
/*clocks = <&bpmp_clks TEGRA194_CLK_EXTPERIPH1>,
<&bpmp_clks TEGRA194_CLK_EXTPERIPH1>;
clock-names = “extperiph1”, “pllp_grtba”;
mclk = “extperiph1”; */
clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_3>;
clock-names = “clk_out_3”;
mclk = “clk_out_3”;
reset-gpios = <&gpio CAM0_RST_L GPIO_ACTIVE_LOW>;
camera_mipi_lanes = <0x4>;
mode0{ //1920x1080_60Fps
mclk_khz = “24000”;
set_mode_delay_ms = “5000”;
num_lanes = “4”;
Why do you suspect clock config? I don’t think the clocks are the key point.
And how do you control configure the sensor streaming without i2c REG programing?
We don’t need to controll the camera there is a internal microcontroller which will take care of all. and this camera has only 4Lane Mipi output. there is no I2C.
And the power related macros all i have commented because the camera power will be provided by external not by the SOC. where i have removed the power related macros there RESET are available
I’m not getting why all the time the camera is getting reset’s
if go through my camera driver you may get to know the things
ev9500m.c (13.2 KB)