Are there kernel facilities for performing DMA to/from PCIe BAR regions?
We have successfully allocated IOVA memory for the PCIe device, and created an IOMMU mapping for the GP-DMA in the Tegra NX. But the memory controller throws an error for the destination address that is in the BAR region. So we believe it is not possible to reach the memory mapped bus (BAR region) from the IOMMU.
Yes. It is not possible to use the General-Purpose DMA engine to do DMA to/from PCIe BAR region. PCIe root port has a DMA engine build into it. Please take a look at the registers mentioned in the TRM (path: High-Speed I/O → PCI Express (PCIe) Controller → PCIe Registers → PCIe IATU)
Also, take a look at dma_write() and dma_read() functions in pcie-tegra.c file
Thank you quick response and verification.