Bus Mastering DMA on Xavier NX

Robotics & Edge Computing Jetson & Embedded Systems Jetson Xavier NX
1

Hi,
I’m working on Xavier NX that is connected to Xilinx FPGA through PCIe (Xavier NX as endpoint). I need to transfer buffer (say 12MB in size) between two boards (in both direction). I supposed to use bus mastering DMA on Xavier NX to perform this. But, I didn’t get any supported documents or similar examples on xavier side. Can anybody help me…?
Thanks all…

3

Sorry for the late response, is this still an issue to support? Thanks

4

Is there any documents or examples to do “bus mastering DMA over PCIe on xavier nx (xavier is endpoint)” ?
Thank you.

6

Hi,

Refer to

  1. Tegra virtual Ethernet driver over PCIe
    kernel/nvidia/drivers/pci/endpoint/functions/pci-epf-tegra-vnet.c → EP driver
    kernel/nvidia/drivers/net/ethernet/nvidia/pcie/tegra_vnet.c → EP client driver in host

  2. PCIe DMA test driver which has simple directed test for both direct and linked list mode.
    kernel/nvidia/drivers/misc/tegra-pcie-ep-mem.c → EP client driver

  3. Refer to PCIE_DMA registers in PCIe IATU section of Xavier TRM.

Thanks,
Manikanta

8

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.