use PCIe endpoint mode to communication in two Xaviers

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

https://devtalk.nvidia.com/default/topic/1039469/jetson-agx-xavier/how-another-cpu-communicate-with-xavier-through-pcie-solved-/post/5281509/#5281509

In the post above, it said that:
“Using the PCIe endpoint mode to communicate with RDMA between two Xavier’s will be supported in a future release of JetPack.”

What is the current status for this function?

2

Hi zhuce_cgf,

This feature is under developing now, it will be supported in a future release of JetPack, please stay tuned.

Thanks

3

When will the next release be?

4

Hi Kayccc.

Can you send me the link the pcb layout orcad layout & cadence 17.2 for PCIE endpoint.

 602-83317-1000-A01.pdf
5

Schematic of P3317 is in the attachment of pdf file: [url]https://developer.nvidia.com/embedded/dlc/jetson-agx-xavier-series-pcie-endpoint-design-guidelines-application-note[/url]

No other related files can be provided.

6

Hi Trumany.

Your
NVIDIA Jetson AGX Xavier Series PCIe Endpoint Design Guidelines DA-09357-001_v1.1 | 1

I am looking for Orcad and Cadence layout and Gerber file for :

This info 602-83317-1000-A01.pdf (E3317-A01 X16 PCIe Tx/Rx Swap Module )
nv_pn 600-83317-1000-100
PCB REV E3317-A01

Thanks,

7

The P3317 schematic is in DA-09357-001_v1.1 pdf file, please check its attachment and open it.

All we can provide are in DLC now. No layout and Gerber files of P3317 is released.