does TX2 supports embedded MIPI streaming?

Hi All,

  1. does TX2 supports embedded MIPI streaming. ( I want to connect a depth camera, which has multiple sensors over single MIPI line). can TX2 supports it in both firmware and hardware?

If not,
which TX processors supports the same.

2.Do I need ISP proprietary software to integrate new sensors to TX2 or any other tegra processors?

Thanks in advance,


What’s embedded MIPI streaming?
Could it be the virtual channel? TX2 and Xavier will support it in plan.

I have depth camera, it has multiple cameras, it will streaming all the data through single MIPI lane. its like connecting multiple cameras to single MIPI lane with multiplexing. I call that has embedded MIPI streaming.

Yes, we have to implement the same using virtual channel.

I know that TX2 hw support is there for embedded MIPI streaming but there is no software support.

what you mean by “TX2 and Xavier will support it in plan”, is there any plan to support in future. can you please provide me the link of of the same.


The virtual channel for TX2 is not ready yet. We are planning to implement it.

Thanks for response.

is virtual channel for already working in any other processor?

Also please let me know when is virtual channel implementation will be completed in TX2?


Hi Mahesh,

The virtual channel will be supported on Xavier first.
For TX2, there is no firm schedule yet.


Hi Kayccc,

Thanks for the response.

Can I know when virtual channel will be supported in xavier?

Regards, Mahesh

Hi Kaycc,

Our customer wants virutal channel implementation at the earliest. They have requested us to check the feasibility of implementing all it by ourselves.

Do we require to have access to any proprietary code of Nvidia to implement virtual channel. Please provide your inputs.


Hi mahesha.m,

We don’t have much information for virtual channel feature on TX2 to share until it’s implemented on Xavier.
AFAIK, that will require architecture and low layer functions which is not able to be done by customers themselves.