Error Code: 9: Skipping tactic 0x001526e231ae2e51 due to exception Cask convolution execution

Description

[E] Error Code: 9: Skipping tactic 0x001526e231ae2e51 due to exception Cask convolution execution
Getting this error when exporting my .pt using the Ultralytics library.

Environment

TensorRT Version: 10.3
GPU Type: NVIDIA A10G
Nvidia Driver Version: 555.58.02
CUDA Version: 12.5
CUDNN Version: 90100
Operating System + Version: Ubuntu 20.04.6 LTS
Python Version (if applicable): 3.11.9
PyTorch Version (if applicable): 2.4.0

Relevant Files

export_output.txt (9.2 MB)

Steps To Reproduce

I did not use trtexec at the command line, but I assume to reproduce this would work:
trtexec --onnx=reproduce.onnx --saveEngine=reproduce.engine --optShapes=‘images’:1x3x1280x1020

I would appreciate any help, thank you! Also happy to share the .onnx privately

Hi @cwilkins1 ,
Please share the onnx model with us.

I encountered the same problem:

/usr/local/TensorRT/bin/trtexec --onnx=best-20260403.onnx --saveEngine=guotai16-old1.trt --fp16

Selected Device: NVIDIA GeForce RTX 4090

TensorRT version: 10.14.1

Driver Version: 580.126.20

CUDA Version: 13.0

ubuntu 22.04

best-20260403.zip (86.1 MB)

Hi @rainbowsister, thanks for sharing the details and the model.

A quick clarification first: the [E] Error Code: 9: Skipping tactic … due to exception Cask convolution execution line is, on its own, a non-fatal message. It just means TensorRT’s auto-tuner discarded one specific kernel implementation during timing and moved on to the next candidate. As long as at least one tactic per layer succeeds, the engine still builds correctly. So the first thing worth checking is whether your build is actually failing, or whether you’re seeing these warnings but trtexec ultimately reports Engine built successfully. Could you confirm which one?

If the build is truly failing (i.e., you’re also seeing something like Could not find any implementation for node …), then a few things to try:

  1. Re-run with --verbose and a larger workspace pool: --memPoolSize=workspace:4096
  2. Build without --fp16 first to see if it’s specific to FP16 tactic paths.
  3. Double-check that your driver (580.126.20) and CUDA 13.0 are within the TensorRT 10.14 support matrix that’s a very new stack.

One other thing your environment (TRT 10.14.1, RTX 4090, CUDA 13.0) is quite different from the original 2024 report (TRT 10.3, A10G, CUDA 12.5), and the tactic ID is just a kernel hash that’s not necessarily shared between TRT versions. Even though the surface error string looks similar, the underlying cause is likely different. Could you open a new topic with your full verbose log and the trtexec command line you’re running? That’ll let us triage your case cleanly without it getting tangled with the original 2024 context.

Closing this one as its old and non relevant. You can always points to this post in a new thread/post, that helps it track better.

Thanks!