Hello,
Did you manage to make a full description of the process that does not break the network interface? Followed the guide on Jetson/TX2 SPI - eLinux.org and my ethernet was gone after.
Thanks,
Jojo
As I mentioned in a previous post, the problem is that when you follow these instructions, you don’t capture the entire current device tree and the associated settings.
As a result, you need to decompile the device tree from /proc/device-tree NOT the provided DTB files, which won’t contain all these settings.
What this means is that in the section entitled “Decompiling the Device Tree” from Jetson/TX2 SPI - eLinux.org you need to run the following command:
dtc -I fs -O dts -o extracted_proc.dts /proc/device-tree
This will create a DTS named extracted_proc.dts from the current settings that are running on your TX2.
This is the only step that needs to change in the wiki. However, it is also not necessary to recompile the entire kernel. Instead, you can follow my previous response in this thread on how to build just the SPI driver module.
@jojo
It’s better flash the DTB by flash command instead of modify the extlinux due plugin manager will broken may cause unknow problem like break the network interface. Below is the command flash the DTB only.
sudo ./flash.sh -r -k kernel-dtb jetson-tx2 mmcblk0p1
Thanks dwd_pete! It works now. Actually my network interface broke in the first part “Building the Kernel”, but dwd_pete’s solution solved this. We should probably update the wiki with these steps since it took me quite some time to reflash the image every time I broke the interface. Adding the steps for only rebuilding the SPI driver and decompiling the device tree from /proc/device-tree would be great.
Hi, jojo_
I’m glad to hear you got it going, and sorry the method I introduced caused you some hassle. Can I confirm, are you still manually adding the FDT entry in extlinux.conf, yes?
David.
Thanks ‘dwd_pete’, I’ve updated the wiki with your suggestion.
David.
Hello David. No problem! I am just happy that people are working on these things. Yes, I manually added the FDT entry.
Jojo
Thanks, Jojo.
I think this method (manually editing the FDT entry) isn’t that practical, however, it does get allow you to get something going so you can start developing.
What I’ve been doing is adding my own device trees to the kernel build process on a host machine and flashing the Jetson. From what I’ve found, the $ ./flash.sh script does a lot of “under the hood” stuff to what eventually becomes the DTB(s) used by the Jetson. From what I understand, my original method (de-compiling and editing the /boot/dtb entry) is only half(?) of the device tree that’s expected or required (which is why the Ethernet fails).
I’ll prepare a nice detailed method for doing it for a host build, as I just don’t believe there’s a clean way of doing it on-target. I know it’s bit annoying to have to do this on a host machine, but I believe it’s the cleanest way of doing it, especially if you intend on tracking your changes, etc.
Thanks,
David.
I’m trying to ascertain where this ./flash.sh script is. It’s not on my host nor my TX2.
What are people talking about?
@david_evans_g
After run the JetPack-L4T-xxx.run will gen 64_TX2 folder. You can find if in …/64_TX2/Linux_for_Tegra_xxx/
I would like to use SPI2 like the SPI3. What do i have to change in the device tree file to enable SPI2?
@sebastian.weidmann
More specific will help to get the direction.
After this tutorial “Jetson/TX2 SPI - eLinux.org” i have my SPI /dev/spidev.3.0. For my application i need a second SPI. I see in the schematics that the TX2 has more than one SPI. But they are routed to camera interfaces. I don´t need a camera. I need a second SPI. I have to connect two SPI devices to the TX2 Board.
Hi, Sebastian.
Firstly, assuming you’re using the Jetson TX2 developer board, you will need to get access to the J23 or J22 headers I believe the other 2 SPI are on those headers, but they’re not easily accessible, you may need connector
Someone please correct me if I’m wrong on this, but I think the SPI you’re looking for is spi@3210000 in the same way you modified your device tree for SPI on the J21 header to be spi@3240000. I’ve never tried this, but that’s my best guess.
Thanks,
David.
Hi, Sebastian.
I’ve found this on another post:
I think spi0, spi1 and spi3 are on the J21, J22 and J23 respectively.
spi0 = "/spi@3210000";
spi1 = "/spi@c260000";
spi2 = "/spi@3230000";
spi3 = "/spi@3240000";
spi4 = "/aon_spi@c260000";
qspi6 = "/spi@3270000";
Hi David,
thx for your reply.
It doesn´t matter that the other SPIs are not on a nice connector like the J21. We can handle this.
I will try to enable spi@3210000 like spi@3240000. I´ll let you know if it works.
Hi, Sebastian.
Please do update, I haven’t heard of anyone successfully use multiple SPI on the TX2 and I would love to know if there’s any issues, as I will be doing something similar soon. Are you using the Development board, or are you using a different/custom carrier board, out of interest?
Thanks,
David.
I´m using the official Nvidia Jetson TX2 Board. L4T 28.2, JetPack 3.2
ok, i changed the dtb file:
spi@3210000 {
reg = <0x0 0x3210000 0x0 0x10000>;
dmas = <0x19 0xf 0x19 0xf>;
interrupts = <0x0 0x24 0x4>;
compatible = “nvidia,tegra186-spi”;
clock-names = “spi”, “pll_p”, “clk_m”;
reset-names = “spi”;
clocks = <0xd 0x31 0xd 0x10d 0xd 0x261>;
nvidia,dma-request-selector = <0x19 0xf>;
resets = <0xd 0x28>;
status = “okay”;
#address-cells = <0x1>;
phandle = <0x7d>;
nvidia,clk-parents = “pll_p”, “clk_m”;
#stream-id-cells = <0x1>;
#size-cells = <0x0>;
dma-names = “rx”, “tx”;
linux,phandle = <0x7d>;
spi@0 {
compatible = “spidev”;
reg = <0x0>;
spi-max-frequency = <0x1312D00>;
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x1e>;
nvidia,cs-hold-clk-count = <0x1e>;
nvidia,rx-clk-tap-delay = <0x1f>;
nvidia,tx-clk-tap-delau = <0x0>;
};
};
Now i have /dev/spidev0.0, but nothing happens on the spi0 clock pin when i send data.
i tried another spi:
spi@3230000 {
reg = <0x0 0x3230000 0x0 0x10000>;
dmas = <0x19 0x11 0x19 0x11>;
interrupts = <0x0 0x26 0x4>;
compatible = "nvidia,tegra186-spi";
clock-names = "spi", "pll_p", "clk_m";
reset-names = "spi";
clocks = <0xd 0x2e 0xd 0x10d 0xd 0x261>;
nvidia,dma-request-selector = <0x19 0x11>;
resets = <0xd 0x2a>;
status = "okay";
#address-cells = <0x1>;
phandle = <0x7e>;
nvidia,clk-parents = "pll_p", "clk_m";
#stream-id-cells = <0x1>;
#size-cells = <0x0>;
dma-names = "rx", "tx";
linux,phandle = <0x7e>;
spi@0 {
compatible = "spidev";
reg = <0x0>;
spi-max-frequency = <0x1312D00>;
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x1e>;
nvidia,cs-hold-clk-count = <0x1e>;
nvidia,rx-clk-tap-delay = <0x1f>;
nvidia,tx-clk-tap-delau = <0x0>;
};
};
Now i have /dev/spidev2.0, but nothing happens too.
Any ideas?
It works!!! Change this in the dtb file to enable /dev/spidev1.0
After this you have access to spi1 on J23.
ORIGINAL:
spi@c260000 {
reg = <0x0 0xc260000 0x0 0x10000>;
dmas = <0x19 0x10 0x19 0x10>;
interrupts = <0x0 0x25 0x4>;
compatible = “nvidia,tegra186-spi”;
clock-names = “spi”, “pll_p”, “osc”;
reset-names = “spi”;
clocks = <0xd 0xde 0xd 0x10d 0xd 0x264>;
spi-max-frequency = <0xb71b00>;
nvidia,dma-request-selector = <0x19 0x10>;
resets = <0xd 0x29>;
status = “okay”;
#address-cells = <0x1>;
phandle = <0x81>;
nvidia,clk-parents = “pll_p”, “osc”;
#stream-id-cells = <0x1>;
#size-cells = <0x0>;
dma-names = “rx”, “tx”;
linux,phandle = <0x81>;
prod-settings {
prod_c_cs0 {
prod = <0x4 0xfc0 0x400>;
};
};
TO:
spi@c260000 {
reg = <0x0 0xc260000 0x0 0x10000>;
dmas = <0x19 0x10 0x19 0x10>;
interrupts = <0x0 0x25 0x4>;
compatible = "nvidia,tegra186-spi";
clock-names = "spi", "pll_p", "osc";
reset-names = "spi";
clocks = <0xd 0xde 0xd 0x10d 0xd 0x264>;
spi-max-frequency = <0xb71b00>;
nvidia,dma-request-selector = <0x19 0x10>;
resets = <0xd 0x29>;
status = "okay";
#address-cells = <0x1>;
phandle = <0x81>;
nvidia,clk-parents = "pll_p", "osc";
#stream-id-cells = <0x1>;
#size-cells = <0x0>;
dma-names = "rx", "tx";
linux,phandle = <0x81>;
spi@0 {
compatible = "spidev";
reg = <0x0>;
spi-max-frequency = <0x1312D00>;
nvidia,enable-hw-based-cs;
nvidia,cs-setup-clk-count = <0x1e>;
nvidia,cs-hold-clk-count = <0x1e>;
nvidia,rx-clk-tap-delay = <0x1f>;
nvidia,tx-clk-tap-delay = <0x0>;
};
prod-settings {
prod_c_cs0 {
prod = <0x4 0xfc0 0x400>;
};
};