how to reset rtcpu or arm cpu separately?

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
1

hi,

now I encounter a problem when I use v4l2 to catch camera picture.

when I ioctrl(STREAMON), driver prints message like this:

[ 736.430062] tegra194-vi5 15c10000.vi: unexpected response from camera processor
[ 736.430353] tegra194-vi5 15c10000.vi: vi capture setup failed

I study this problem and find that in function vi_capture_ivc_send_control(),

if (memcmp(&resp_header, &capture->control_resp_msg.header,
sizeof(resp_header)) != 0) {
dev_err(chan->dev,
“unexpected response from camera processor\n”);
err = -EINVAL;
goto fail;
}

resp_header.msg_id = 0x11(CAPTURE_CHANNEL_SETUP_RESP),
capture->control_resp_msg.header.msg_id = 0x37(CAPTURE_PHY_STREAM_OPEN_RESP)

Is it possible that rtcpu(RCE) has a problem on its side?

Whether the problem can be identified through reset rtcpu or arm cpu separately?

2

Shouldn’t be the RTCPU’s problem. Have a reference to below link to enable the trace to check.

https://elinux.org/Jetson_TX2_Camera_BringUp