HS_CURR_LEVEL Offset Adjustment Procedure issue

[dimaz]

Hi.

I try to change HS_CURR_LEVEL value via devmem2 utility.
But I can’t change any bit in FUSE_USB_CALIB register:

demo@tegra-ubuntu:~$ sudo devmem2 0x038201F0 w 0xAAA8891
/dev/mem opened.
Memory mapped at address 0x7f9a1a6000.
Value at address 0x38201F0 (0x7f9a1a61f0): 0xAAA8892
Written 0xAAA8891; readback 0xAAA8892

Written value is not equal to readback value.

What do I do wrong?

[DaneLLL]

Hi,
Is it specific to writing 0x038201F0? Please try other registers and check if the issue is specific to the register.

[dimaz]

Hi.
Technical reference manual for Xavier NX is missing on Nvidia download center.
Could you provide it, or what register do I have to try without damage?

[DaneLLL]

Hi,
Please check technical reference manual for Xavier. It is same for Xavier and Xavier NX.
Tuning and Compliance Guide is different for Xavier and Xavier NX.

[dimaz]

I am trying to find this register in TRM and have a problem.

According to the Jetson_Xavier_NX_Tuning_and_Compliance_Guide_Application_Note_DA-09890-001_v1.2.pdf
HS_CURR_LEVEL values for ports 0, 1 and 2 are located in one register, named FUSE_USB_CALIB with address 0x038201F0:

But in TRM, there is no any FUSE_USB_CALIB with address 0x038201F0.

Moreover, FUSE_USB_CALIB values are located in three separates registers, named
XUSB_PADCTL_USB2_OTG_PAD0_CTL_1_0
XUSB_PADCTL_USB2_OTG_PAD1_CTL_0_0
XUSB_PADCTL_USB2_OTG_PAD3_CTL_0_0

Could you please clarify this issue.

[WayneWWW]

Hi,

Could you also try to use busybox devmem to write that register (0x038201F0)?

[dimaz]

Hi.

I don’t know how to use busybox devmem. Could you explain it?

And why there is difference between register’s description?

[DaneLLL]

Hi,
Table 5 in Tuning and Compliance Guide is correct. It should work fine without issue. Do you enable USB2-0 in device tree? Another possibility is the port is not enabled so the value is not changed.

[dimaz]

Hi.

USB is enabled.
Register 0x038201F0 is not accessible for writing:

demo@tegra-ubuntu:~$ sudo devmem2 0x038201F0 w 0xAAA8891
/dev/mem opened.
Memory mapped at address 0x7fa3e58000.
Value at address 0x38201F0 (0x7fa3e581f0): 0xAAA8892
Written 0xAAA8891; readback 0xAAA8892

Further, I decided to try write register XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0
Bits 5:0 are HS_CURR_LEVEL (for port 0).

Register XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0 has address 0x03520088

demo@tegra-ubuntu:~$ sudo devmem2 0x03520088 w 0x2CC88D1
/dev/mem opened.
Memory mapped at address 0x7fb4ac4000.
Value at address 0x3520088 (0x7fb4ac4088): 0x2CC88D2
Written 0x2CC88D1; readback 0x2CC88D1

And this register writes OK.

So, Table 5 in Tuning and Compliance Guide does NOT work.

Why register 0x038201F0 in Table 5 is not writable and its description is missing in TRM?

[WayneWWW]

Hi,

Does your “register write ok” mean your HS_CURR_LEVEL is also adjusted? or you just mean you can write register succesfully?

[dimaz]

“register write ok” means that HS_CURR_LEVEL value also changes. It related to XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0 register.

Through 0x038201F0 register (which absent in official TRM) I can read HS_CURR_LEVEL value, which I wrote via XUSB_PADCTL_USB2_OTG_PAD0_CTL_0_0 regisre.
But I can’t write 0x038201F0.

[WayneWWW]

Let me check with the owner of this document for this situation. Thanks.

[WayneWWW]

Hello,

Just clarify this with teams. The conclusion for the whole procedure is

1. read the value from fuse register (0x038201F0) → got current value.
2. Tune the value in XUSB_PADCTL_USB2_OTG_PADx_CTL_0_0 register until it meets the expectations.

The 0x038201F0 is just a fuse register which cannot be written. Only can be adjust by using XUSB_PADCTL_USB2_OTG_PADx_CTL_0_0 mentioned on the tuning guide.

[dimaz]

Thank you for clarification.

But what is the sense of fuse register (0x038201F0), if I can read values from register XUSB_PADCTL_USB2_OTG_PADx_CTL_0_0 directly?