Hi everyone 👋
We want to interconnect several (at least 4) Orin Nano/NX modules to form a small cluster of compute nodes. The conventional way is to use an Ethernet switch and connect all modules to it. However, Jetson modules only support 1GbE which isn’t enough for what we want to build. We’d like to utilize all three USB 3.2 Gen 2 ports, each supporting 10Gb/s (in host mode) and 5Gb/s (in device mode) according to the Interface Comparison and Migration Note (USB 3.2 Mapping Options). We had a look at Figure 1.1 in the Orin Technical Reference Manual (page 5583) and it looks like only one USB 3.2 connection can be in device mode at any given time.
1) Is it possible to dynamically change which connection is in device/host mode, i.e. first USBSS0, then USBSS2, etc.?
2) Could you provide a sample PCB schematic, similar to Figure 7-1 and Figure 7-2 of the Product Design Guide (page 29), but illustrating how to implement a dynamic device/host connection instead?
3) Can we perhaps bypass the USB protocol entirely, utilize the UPHY lanes directly and write custom drivers for the cross-module communication?
For 2), we don’t have such sample can be shared.
For Q1, It is possible, but only one device mode port could be in use at same time. You can have multiple host ports but there would always be only one device mode port.
For Q3, no, not possible. Need to go through the interface/driver we provided.
Ok. Could you confirm how the USBSS_RX/TX pins should be connected if we follow the example schematic from Figure 7-1 but extend it to USB 3.2. Which transient voltage suppressor diodes should be used in this case— MSP5.0A-E3/89A (Figure 7-1) or TPD4E05U06 (Figure 7-2)? And are 0.1uF AC capacitors required on the TX lines?
Can you share some pointers to how this can be dynamically configured at runtime (i.e. through software)? Hoping there would be similarities to the Nano/NX modules, we went through the documentation on the Jetson AGX Orin Series but it appears to be for static use only.
Do you mean to combine USB0 + USBSS as host ? You can follow the figure 7-2 for that, and since USB0 need to be in device mode in recovery, a switch will be needed. You can refer to Xavier devkit carrier P2822 schematic for the switch design.
There would be a software node "/sys/class/usb_role/usb2-0-role-switch/role " to swtich the role.
Thanks for the hint. It’s a step in the right direction. However, the AGX Xavier Developer Kit has two USB-C ports and uses a dual-port USB-C controller (CYPD4226-40LQXIT) which indeed handles device/host mode but also supports various (for us unnecessary) features like DisplayPort and Power Delivery, resulting in rather complicated circuitry and an extra MCU drawing power. It would be great if you could at least provide a USB 3.2 device-only schematic (with the right TVS diodes and AC capacitor values).
First, do you want to combine USB0 + USBSS? If so, please just follow figure 7-2 and swap USB1 with USB0. And add a switch to USB0 like that of P2822. We don have such schematic can be shared.
Yes, we’d like to combine USB0 and USBSS0. For the device-only case, is this what you suggest?
Yes, it looks fine. You can use pin 87 (GPIO00) for VBUS detection like that of nano design.
Thanks for the confirmation. Regarding VBUS detection: In addition to USB0/USBSS0 being in device mode we’d like to connect the other USB 3.2 ports in host mode. Can we use arbitrary GPIO pins for the
EN connection? Figure 7-2 shows a trace between
GPIO00 which is a little misleading.
Sure, you can use other GPIO for the EN.
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