JETSON AGX ORIN r35.1 Cold Boot Sequence: MB1/MB2 Location, Memory Mapping, and Hardware Diagram Inquiry

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Orin
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I am currently studying the boot process of the JETSON AGX ORIN, specifically the cold boot sequence in the r35.1 boot flow. I have four questions:

  1. I assume that MB1 and MB2 are stored in predetermined locations. Could you please clarify where exactly they are located (i.e., which location in ROM they are loaded from)?
  2. Could you provide information on which memory and addresses MB1 and MB2 are mapped to? (I am trying to create a memory map of the boot process.)
  3. Is there a block diagram available that focuses on the hardware involved in the boot process?
  4. Is there any documentation that provides a detailed explanation of the cold boot sequence diagram?
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  1. Suggest not to use rel-35.1 anymore because this is a very old BSP. Lots of known issues in this version and already fixed in later release.

  2. You could refer to document for the bootloader.
    Bootloader — NVIDIA Jetson Linux Developer Guide 1 documentation

Actually this part has not much to customize as this is not open source.

3

Understood. If the exact storage location is confidential, could you please answer the following questions?

  1. Where is the BOOTROM physically located in the System-On-Module diagram?
  2. Are UEFI, MB1, and MB2 stored in the QSPI NOR according to the System-On-Module diagram?
  3. Where is the BPMP physically located?

image

4

What does your “physically located” mean here?

5

Could you please clarify where it is located in the referenced diagram?

6

They are not located on the diagram and it is pointless to share such information


We only have such concept video for Jetson nano. No similar items for Orin.

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Thank you. This was exactly what I needed. Regarding the Orin, is there any documentation or video that explains this in detail? If not, could you at least highlight the key differences between the Nano and Orin?

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