We are recently testing the adequation of FPGA based MIPI TX solutions with NVIDIA Jetson boards.
We managed to capture frames (with v4l2 for now) with the Jetson nano, but we had negative results on XavierNX products. In both cases, we use the standard dev kits.
On the XavierNX, the following errors are observed on dmesg:
When investigating the differences between Nano and XavierNX, we noticed that the voltage level of power down and master clock is not specified on the Nano datasheet: (Nano of the left, XavierNX on the right)
I can not replicate the original error messages. Here is the output now:
[ 447.166659] [RCE] Configuring VI GoS.
[ 447.166674] [RCE] VM GOS[#0] addr=0xc2100000
[ 447.166684] [RCE] VM GOS[#1] addr=0xc2101000
[ 447.166692] [RCE] VM GOS[#2] addr=0xc2102000
[ 447.166698] [RCE] VM GOS[#3] addr=0xc2103000
[ 447.166705] [RCE] VM GOS[#4] addr=0xc2104000
[ 447.166711] [RCE] VM GOS[#5] addr=0xc2105000
[ 447.166719] [RCE] vi5_hwinit: firmware CL2018101701 protocol version 2.2
[ 447.166731] [RCE] VI GOS[#0] set to VM GOS[4] base 0xc2104000
[ 449.878637] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 449.878798] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 449.878962] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 449.881679] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback found for msg id: 0x39
[ 449.881862] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback found for msg id: 0x41
[ 449.882013] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback found for msg id: 0x37
[ 449.882220] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
[ 449.910731] [RCE] Configuring VI GoS.
[ 449.910742] [RCE] VM GOS[#0] addr=0xc2100000
[ 449.910748] [RCE] VM GOS[#1] addr=0xc2101000
[ 449.910754] [RCE] VM GOS[#2] addr=0xc2102000
[ 449.910761] [RCE] VM GOS[#3] addr=0xc2103000
[ 449.910767] [RCE] VM GOS[#4] addr=0xc2104000
[ 449.910773] [RCE] VM GOS[#5] addr=0xc2105000
[ 452.438657] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 452.438825] tegra194-vi5 15c10000.vi: uncorr_err: request timed out after 2500 ms
[ 452.439071] tegra194-vi5 15c10000.vi: err_rec: attempting to reset the capture channel
[ 452.442551] tegra194-vi5 15c10000.vi: err_rec: successfully reset the capture channel
Note that everything works like a charm on the Nano devkit !
Are the MIPI voltage levels different between the boards ?
We double checked the embedded_metadata_height and it is correctly configured on the camera module side.
Again, we can successfully capture frames on different Jetson Nano boards but we have no success on XavierNX devkits. We can’t understand the difference between the results.
We were also able to capture frames using a combo of Jetson Nano SoM with a XavierNX devkit carrier board. The voltage levels seems to be the same.
I’m attaching new logs (with v4l2 then nvgstcamera captures) in case something was missed last time.
Thanks,
K cam2.log (170.0 KB) gst.log (4.0 KB)
The NVCSI/VI logic is totally different on Nano and TX2/Xavier, TX2/Xavier have much check that would cause some working case on Nano but didn’t working on TX2/Xavier.
Now the log show the PIXEL_SHORT_LINE, it could be the output pixel(width) less than expect.