Jetson Nano custom board. emmc chip on SDMMC3

Hello,
We have a custom board with a eMMC chip connected to SDMMC3 (eMMC chip CLK/CMD/DATA is connected to Nano pin #229, 227, 219, 221, 223, 225).
I modified the dts files to enable the SDMMC3 controller:

sdmmc3: sdhci@700b0400 {
		status = "okay";
                uhs-mask = <0x4>;
                power-off-rail;
                no-sdio;
                no-sd;
                max-clk-limit = <400000>;
                tap-delay = <4>;
                trim-delay = <8>;
                nvidia,is-ddr-tap-delay;
                nvidia,ddr-tap-delay = <0>;
                mmc-ocr-mask = <0>;
               // max-clk-limit = <199680000>;
                bus-width = <4>;
                built-in;
                calib-3v3-offsets = <0x0505>;
                calib-1v8-offsets = <0x0505>;
                compad-vref-3v3 = <0x7>;
                compad-vref-1v8 = <0x7>;
                nvidia,en-io-trim-volt;
                nvidia,is-emmc;
                nvidia,enable-cq;
                ignore-pm-notify;
                keep-power-in-suspend;
                non-removable;
                cap-mmc-highspeed;
                cap-sd-highspeed;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
                mmc-hs400-1_8v;
                nvidia,enable-strobe-mode;
                mmc-hs400-enhanced-strobe;
                nvidia,min-tap-delay = <106>;
                nvidia,max-tap-delay = <185>;
	 	pll_source = "pll_p", "pll_c4_out2";
                resets = <&tegra_car TEGRA210_CLK_SDMMC3>;
                reset-names = "sdhci";
                clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
                       <&tegra_car TEGRA210_CLK_PLL_P>,
                       <&tegra_car TEGRA210_CLK_PLL_C4_OUT2>,
                       <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
                clock-names = "sdmmc", "pll_p", "pll_c4_out2", "sdmmc_legacy_tm";
		vmmc-supply = <&max77620_ldo2>;
                /delete-property/ no-mmc;
		sd-uhs-sdr104;
                sd-uhs-sdr50;
                sd-uhs-sdr25;
                sd-uhs-sdr12;

	};

but still can’t see /dev/mmcblk1.
What should I do to use this eMMC chip. Thanks!

Sorry for the late response, have you managed to get issue resolved or still need the support? Thanks

Please refer to sdmmc4 device tree which is for the emmc.

I don’t need to solve this problem for the time being. I’ll ask for advice when I need it.