Jetson TX2 NX No Output on HDMI 2

Hi, i’m having an issue with a Jetson TX2 NX. According to Nvidia, the TX2 NX has the ability to output HDMI on both display connectors, as can be seen in this screenshot of the Jetson TX2 NX Interface Comparison and Migration:

However when i connect to HDMI 2, there is no output on the display and dmseg shows the following log:

[  125.932145] tegradc 15210000.nvdisplay: dp: unplug event received
[  125.932212] hpd: state 3 (Disabled), hpd 0, pending_hpd_evt 1
[  125.932224] hpd: switching from state 3 (Disabled) to state 0 (Reset)
[  125.932245] hpd: state 0 (Reset), hpd 0, pending_hpd_evt 0
[  125.932274] tegradc 15210000.nvdisplay: blank - powerdown
[  125.932331] extcon-disp-state external-connection:disp-state: cable 44 state 0 already set.
[  125.932341] Extcon DP: HPD disabled
[  125.932351] hpd: hpd_switch 0
[  125.932362] hpd: switching from state 0 (Reset) to state 1 (Check Plug)
[  125.932384] hpd: state 1 (Check Plug), hpd 0, pending_hpd_evt 0
[  125.932399] hpd: switching from state 1 (Check Plug) to state 3 (Disabled)
[  125.948371] tegradc 15200000.nvdisplay: blank - powerdown
[  125.948384] tegradc 15200000.nvdisplay: unblank
[  125.948400] tegradc 15200000.nvdisplay: unblank
[  125.948411] tegradc 15210000.nvdisplay: blank - powerdown

I find it odd that even when connecting to HDMI 2 (tegradc 15210000), there is an blank message for HDMI 1 (tegradc 15200000) and HDMI2 and only unblank signal going to HDMI 1 (tegradc 15200000 - duplicate):

[  125.948371] tegradc 15200000.nvdisplay: blank - powerdown
[  125.948384] tegradc 15200000.nvdisplay: unblank
[  125.948400] tegradc 15200000.nvdisplay: unblank
[  125.948411] tegradc 15210000.nvdisplay: blank - powerdown

This is not a 1 time behaviour, as we have repeteated the text multiple times.

HDMI 1 has a ‘normal’ behaviour

When connecting to the HDMI 1, it works with no issue and dmesg shows:

[  173.954522] tegradc 15200000.nvdisplay: blank - powerdown
[  173.954569] tegradc 15200000.nvdisplay: unblank
[  173.955212] tegra_nvdisp_handle_pd_enable: Unpowergated Head0 pd
[  173.955311] tegra_nvdisp_handle_pd_enable: Unpowergated Head1 pd
[  173.957187] Parent Clock set for DC plld2
[  173.962305] tegradc 15200000.nvdisplay: hdmi: tmds rate:148500K prod-setting:prod_c_hdmi_111m_223m
[  173.963724] tegradc 15200000.nvdisplay: hdmi: get YCC quant from EDID.
[  173.999787] extcon-disp-state external-connection:disp-state: cable 47 state 1
[  173.999796] Extcon AUX1(HDMI) enable
[  174.016085] extcon-disp-state external-connection:disp-state: cable 51 state 1
[  174.016090] Extcon HDMI: HPD enabled
[  174.016165] tegradc 15200000.nvdisplay: hdmi: plugged
[  174.036160] tegradc 15200000.nvdisplay: unblank
[  174.036169] tegradc 15210000.nvdisplay: blank - powerdown
[  174.048548] tegradc 15200000.nvdisplay: unblank
[  174.048556] tegradc 15210000.nvdisplay: blank - powerdown

That document is just hardware design guide. It doesn’t tell you there is no need to do the software configuration.

Did you ever change your device tree configuration to enable a second HDMI?

We already tried to change the device tree to enable the second HDMI, but as far as we know, there is no guide for doing it. We tried to switch the properties of the “sor”, to be enable like “sor1”.

What was modified:

sor {
                                                status = "okay";
                                                nvidia,active-panel = <0x6d>;

                                                dp-display {
                                                        status = "disabled";

                                                hdmi-display {
                                                        status = "okay";

                                        sor1 {
                                                status = "okay";
                                                nvidia,active-panel = <0x70>;

                                                dp-display {
                                                        status = "disabled";

                                                hdmi-display {
                                                        status = "okay";

                sor {
                        compatible = "nvidia,tegra186-sor";
                        reg = <0x0 0x15540000 0x0 0x40000>;
                        interrupts = <0x0 0x9e 0x4>;
                        nvidia,sor-ctrlnum = <0x0>;
                        nvidia,dpaux = <0x6b>;
                        nvidia,xbar-ctrl = <0x0 0x1 0x2 0x3 0x4>;
                        clocks = <0x10 0x61 0x10 0x27 0x10 0x267 0x10 0x128 0x10 0x20b 0x10 0x10d 0x10 0x88 0x10 0x66 0x10 0x58 0x10 0x62>;
                        clock-names = "sor0_ref", "sor_safe", "sor0_pad_clkout", "sor0", "pll_dp", "pllp_out0", "maud", "hda", "hda2codec_2x", "hda2hdmi";
                        resets = <0x10 0x27 0x10 0xf 0x10 0x10 0x10 0x11>;
                        reset-names = "sor0", "hda_rst", "hda2codec_2x_rst", "hda2hdmi_rst";
                        status = "okay";
                        nvidia,ddc-i2c-bus = <0x6c>;
                        nvidia,active-panel = <0x6d>;
                        nvidia,hpd-gpio = <0x21 0x78 0x1>;
                        linux,phandle = <0x69>;
                        phandle = <0x69>;

                        hdmi-display {
                                compatible = "hdmi,display";
                                status = "okay";
                                generic-infoframe-type = <0x87>;
                                linux,phandle = <0x144>;
                                phandle = <0x144>;

                                disp-default-out {
                                        nvidia,out-type = <0x1>;
                                        nvidia,out-flags = <0x2>;
                                        nvidia,out-parent-clk = "plld3";
                                        nvidia,out-align = <0x0>;
                                        nvidia,out-order = <0x0>;
                                        nvidia,out-xres = <0x1000>;
                                        nvidia,out-yres = <0x870>;

Anything else that we are missing? Is there any other thing we need to modify?

Thanks for your help

Please paste your schematic and full dts instead of current partial one. Also, disable other port in dts and only focus on the port to debug first.

Full dts file in attachment:

d.dts (238.2 KB)

Board Schematic:

Board Schematic.pdf (220.2 KB)

The active panel under your sor is still setting to dp-display.

  	nvidia,active-panel = <0x6d>;

I changed the active panel setting from 0x6d to 0x70, the same as sor1 which is displaying correctly via HDMI and nothing changed.
Is there documentation which describes what each of the settings in the device tree actually do?

You can just share me the dmesg of current situation.

If you need a document, the only one that you can refer to is the TRM of TX2. However, I don’t think it would be easy to understand that.

The basic concept here is sorX represent the hardware pin on your module. For example, sor is for HDMI_DP0 and sor1 is for HDMI_DP1 pin. Since these SOR is able to output either HDMI or DP, you have to tell it which one is enabled and active now.

The nvdisplay is the display controller that can control the SOR. Thus, you can arbitrarily assign SORx to each nvdisplay. And there are 3 nvdisplay on TX2, which means it can support up to 3 monitors.

I find another problem. Why do you change 0x6d to 0x70? There are two hdmi-display, one under sor and another one under sor1.

0x70 is the one under sor1, but the one under sor is 0x144…

Are you always using this full dts to modify your device tree? Actually, if you read our original source code, you will notice they are human-readable variable names…

Hi Wayne, i currently don’t have access to the board but hope to do so later in the day, however i have been using the full dts to modify the device tree and creating a modified dtb to which i point in extlinux.conf.
In the meantime could you point me to where i can access the original source code?

We put the source code here.

And the developer guide has the tutorial section to cross compile it from host machine.

I got as far as going to kernel_src\kernel\kernel-4.9\Documentation\devicetree\bindings and reading some of the documentation, but could you point me to the specific file where it mentions that the hdmi-display under sor is 0x144?

There is no document mentioned such information… because 0x144 is just a hex value that is only in use in your device tree… The device tree uses phandle to identify which node is assigned.

For example, 0x144 in your device tree in the phandle of hdmi-display under your sor…

If I compile my device tree, maybe it will not be 0x144 on my side but something else…

The device tree compiler just convert those human-readable string to such hex since the machine does not use those string to identify the node/property.

Our original dts source files have human-readable string… but I am not sure if you find those files yet or not…

Thank you so much, changing the active-panel to 0x144 worked. I assume this value corresponds to the phandle value on the “hdmi-display” associated with that sor.

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