I try to follow different configurations of amixer that I found in [the doc](Jetson Linux Linux Driver Package Development Guide/asoc_driver.19.2.html#wwpID0E02K0HA) or on the forum but at best I got only loud noise, at worst non functioning channels (with the TDM doc configuration for example).
For mics bit format, it isnāt written in the mic array site, but in the mic documentation, it is writtent 24-bit depth in a 32 bit word. I suppose I have to record in 32 bit.
i think you should configure the I2S interface to use a 32 bit word length for the codec part, and you can left it with a 0 in the input part. This way you can record in S8, S16 or S24, whatever you need.
It seems that you have 4 I2S interfaces with two channels of 32bits words, with 24 bits of useful data in each one.
You can config the I2S interfaces with amixer, using something like:
amixer -c TheNameOfYourCard --stdin <<EOF
sset "I2S3 fsync width" 31
sset "I2S3 codec bit format" 32
sset "I2S3 input bit format" 0
sset "I2S3 axbar bit format" 0
EOF
You should configure more things like who is the bit clock and frame clock master (in this case seems to be the array, so: sset āI2S3 codec master modeā ācbm-cfmā), which ADMAIF you are going to use (for example: sset āI2S3 Muxā āADMAIF1ā and sset āADMAIF1 Muxā āI2S3ā), the sample rate (sset āI2S3 Sample Rateā 48000), the format of the frame clock (i2s, dsp-a, dsp-b, etc)(for example: sset āI2S3 codec frame modeā ādsp-aā), the number of channelsā¦
You can get a list of the properties and valid values using:
It seems it comes from the āI2S4 codec master modeā "cbm-cfmā. If I select ācbs-cfsā I can start recording again with the same problems as before.
I tried with I2S3 and I2S4.
When changing the frame clock format (between 'dsp, it doesnāt change the recorded output (it is again nonsense) when I use the cbs-cfs master mode.
Iām not sure, but i think that somewhere in the devicetree you should be setting up the frame to bit clock ratio (you should set this to 64), althouh maybe that the amixer logic set this value up for you. And maybe you should increase the axbar clock, in order to it being able to transfer all this channels. Have you checked the overrun/underrun bits of the i2s and adma interfaces?
I forgot to mention that when I try to set the axbar bit format I have the error :
amixer -c tegrasndt210ref sset "I2S3 axbar bit format" 0
amixer: Unable to find simple control 'I2S3 axbar bit format',0
amixer -c tegrasndt210ref sset "I2S4 axbar bit format" 0
amixer: Unable to find simple control 'I2S4 axbar bit format',0
I also tried the following :
amixer -c tegrasndt210ref cset name="I2S3 axbar bit format" 0
amixer: Cannot find the given element from control hw:1
amixer -c tegrasndt210ref cset name="I2S4 axbar bit format" 0
amixer: Cannot find the given element from control hw:1
Also what do you mean by config the number of channels of each I2S interface to 2 ? Should I change the command ADMAIF1 for every ADMAIF values ?
And how can I check the overrun/underrun bits of the i2s / adma interfaces ?
When you talk about device tree, the .dtb file that is used while the board is booting ? Or is it a file that is used while flashing the board ?
Sorry Iām not familiar with these types of devicesā¦
Iām sorry, we have a lot of customizations in the kernel and I think that this āaxbar bit formatā is one of those.
From the info in the mic array web page, it seems that there are 4 i2s interfaces, each with 2 channels. So, you need to configure 4 i2s interfaces (4 i2s data lines), plus two common bit and frame clocks, to receive the 7 channels of the array, although in practice you should be capturing 4 audio streams, with 2 channels each, having one of them one channel with silence or with garbage. This is why i told you to configure each i2s interfaceās number of channels to 2.
You can read the registers using de devmem2 tool (you can find the addresses in the Tegra X1 technical reference manual). I think you should be able to read them through sysfs too:
root@localhost:~# cat /sys/kernel/debug/regmap/tegra210-i2s.3/registers
00: 00000000
04: XXXXXXXX
08: 00000000
0c: XXXXXXXX
10: XXXXXXXX
...
root@localhost:~# cat /sys/kernel/debug/regmap/tegra210-admaif/registers
000: XXXXXXXX
004: XXXXXXXX
008: 00000000
00c: XXXXXXXX
010: XXXXXXXX
...
The register 0x10 of each i2s is the one with the underrun bit (with mask 0x02). Ant the registers 0x10 + (n ā 1) * 0x40 (0x10, 0x50, 0x90 ...), are the registers of the ADMAIF with the dma overrun (mask 0x01).
And for the devicetree, yes, it should be a dtb file in the boot directory. You can check the file or files in /boot/extlinux, the FDT file referenced there is the one you need.
Ok I think I donāt understand how to use the board and array properly. On other forum I read that the I2S4 pin could take 16 input as the same time, so I connected the array mics in series and plugged everything on the I2S4 pin 38.
What I donāt get is if I need 4 I2S interfaces, how can I connect mics properly ? The board only have 2 physical I2S interfaces. Maybe I can still use 4 interfaces while connecting everything on I2S4 pin 38 ?
Is an I2S interface just I2Sx with x being a number ?
In the device tree, I didnāt find exactly an attribute āframe to bit clock ratioā, the best I could find is bitclock-slave and bitclock-noninversion linked to i2s4 ans i2s3.
I donāt think you can directly connect that array to the Jetson Nano. The I2S4 does support 16 channels, but for that to work, the 16 channels have to come in a 16-channel TDM. Starting from a frame clock edge, the 16 channels should come one after the other in the I2S data signal. Iām not exactly sure what you mean when you say you connect the microphones in series, but if you want to connect the array to the Jetson Nano through a single I2S, you need to add some logic to mix the 7 (actually 8) channels to create a single TDM between the array and the Jetson Nano.
May be you can do it with a FPGA. I donāt know of any IC that can do that, but that doesnāt mean that it doesnāt exist.
When saying I connected the microphone in series, I meant that I just plugged the 4 microphone data outputs in an electronic breadboard, and plugged the output on the Jetson. Maybe a naive solution considering what you told me.
Itās a shame I canāt use this card, I will try to find an alternative solution.
Thanks for helping, at least I understand why it doesnāt work !
Last bump to be sure that the array is not compatible with the Jetson Nano. Since I canāt return the board, I want to be sure nothing can be done ?
Also I wanted to know, if the board needs 4 I2S interfaces to function properly, configuring only one interface should be enough to use 2 microphones at least ?