Update the routing in DT. The direction doesn’t seem correct, swap the entries, left ← → right, considering the Mic is connected to MIC1 and MIC2. If MIC is connected to IN1P / IN2P / In2N accordingly need to update the routing and mixer controls settings.
"CVB-RT Mic Jack", "CVB-RT MIC1",
"CVB-RT Mic Jack", "CVB-RT MIC2";
您好，我的dts已经是添加了
"CVB-RT Mic Jack", "CVB-RT MIC1",
"CVB-RT Mic Jack", "CVB-RT MIC2";
以下是我dts全部：
tegra_sound_graph: tegra_sound: sound {
compatible = "nvidia,tegra186-audio-graph-card",
"nvidia,tegra186-ape";
clocks = <&bpmp TEGRA234_CLK_PLLA>,
<&bpmp TEGRA234_CLK_PLLA_OUT0>,
<&bpmp TEGRA234_CLK_AUD_MCLK>;
clock-names = "pll_a", "plla_out0", "extern1";
assigned-clocks = <&bpmp TEGRA234_CLK_AUD_MCLK>;
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLA_OUT0>;
nvidia-audio-card,name = "NVIDIA Jetson Orin Nano RT5616";
nvidia-audio-card,mclk-fs = <256>;
/*label = "NVIDIA Jetson Orin Nano RT5616";*/
nvidia-audio-card,widgets =
"Headphone", "CVB-RT Headphone Jack",
"Speaker", "CVB-RT Int Spk",
"Microphone", "CVB-RT Mic Jack";
nvidia-audio-card,routing =
"CVB-RT Headphone Jack", "CVB-RT HPOL",
"CVB-RT Headphone Jack", "CVB-RT HPOR",
"CVB-RT Int Spk", "CVB-RT LOUTL",
"CVB-RT Int Spk", "CVB-RT LOUTR",
"CVB-RT Mic Jack", "CVB-RT MIC1",
"CVB-RT Mic Jack", "CVB-RT MIC2";
/* I2S2 ↔ RT5616 DAI link */
hdr40_snd_link_i2s: nvidia-audio-card,dai-link@77 {
status = "okay";
link-name = "rt5616-playback";
format = "i2s";
bitclock-master = <&rt5616_codec>;
frame-master = <&rt5616_codec>;
codec {
sound-dai = <&rt5616_codec 0>;
prefix = "CVB-RT";
};
};
};
Routing should be as mentioned here, Sample code for 3rd I2S audio codec which is succesfully integrated on Orin Nano/NX platform - #9 by mkumard . Please modify the Mic specific entries only.
This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.