PCIe adoptation

Please also check your flash log to see if your bpmp dtb really got flashed to the board too.

Jetson_flash.log.txt (92.9 KB)


copying bpfdtbfile(/home/jetson/Jetson_35/Linux_for_Tegra/bootloader/t186ref/tegra234-bpmp-3701-0004-3737-0000.dtb)... done.
[   0.0413 ] Change tegra234-bpmp-3701-0004-3737-0000.dtb to tegra234-bpmp-3701-0004-3737-0000_with_odm.dtb
[   0.0421 ] Change tegra234-bpmp-3701-0004-3737-0000.dtb to tegra234-bpmp-3701-0004-3737-0000_with_odm.dtb
[   0.0914 ] /usr/bin/python3 dtbcheck.py -c t234 -o tegra234-bpmp-3701-0004-3737-0000_with_odm.dtb tegra234-bpmp-3701-0004-3737-0000_with_odm_tmp.dtb
[   5.1644 ] adding BCH for tegra234-bpmp-3701-0004-3737-0000_with_odm_aligned.dtb
[   7.9903 ] Disabled BPMP dtb trim, using default dtb
[   9.0949 ] Using bpmp-dtb concatenated with o[ 226.7754 ] Writing partition A_bpmp-fw-dtb with tegra234-bpmp-3701-0004-3737-0000_with_odm_sigheader.dtb.encrypt [ 260160 bytes ]dmdata in blob
[ 348.8360 ] Writing partition B_bpmp-fw-dtb with tegra234-bpmp-3701-0004-3737-0000_with_odm_sigheader.dtb.encrypt [ 260160 bytes ]

I donā€™t really like it, but I canā€™t quite understand it.

Hi,

This ā€œFailed to init UPHY for PCIe EPā€ log will only print when ā€œenable_ext_refclkā€ is set in the driver.

Which means your change to " nvidia,enable-ext-refclk" does not take effect.

Hello.
I did some work, and in this stage, I can see that the root port is sending data, but I do not see any messages from the Jetson side on UPHY_TX12_P/N line.
Itā€™s strange that the DC bias voltage on the this pins is 0V. I expected to see some kind of displacement, which is typical.
Are there any debugging mechanisms that would help localize the cause?

You said that no changes are needed for the deŠ¼ŃƒŠ“щŠ·ŃƒŠŗ board, perhaps for a custom board some changes are needed in the device tree, or are pinmux still needed?
Perhaps you need to specify the number of lines used?

Hi,

Does this issue happen even with SRNS not enabled or this only happened after SRNS enabled?

Also, just a double confirmation. Are all the previous errors already resolved or not?

You didnā€™t reply anything for 4 days and just came back with something new. We need to know if you are telling old issue or new issue.

Yes, if I donā€™t enable SRNS and disable SSC, the error > Failed to init UPHY for PCIe EP: -22 does not appear. But this does not mean that the endpoint has been initialized since I donā€™t have an external ref_сlk from root port.

Yes, all errors remain:

root@ubuntu:/sys/kernel/config/pci_ep# mkdir functions/pci_epf_nv_test/func1
root@ubuntu:/sys/kernel/config/pci_ep# echo 0x10de > functions/pci_epf_nv_test/func1/vendorid
root@ubuntu:/sys/kernel/config/pci_ep# echo 0x0001 > functions/pci_epf_nv_test/func1/deviceid
root@ubuntu:/sys/kernel/config/pci_ep# ln -s functions/pci_epf_nv_test/func1 controllers/141a0000.pcie_ep/
root@ubuntu:/sys/kernel/config/pci_ep# echo 1 > controllers/141a0000.pcie_ep/start
root@ubuntu:/sys/kernel/config/pci_ep#
root@ubuntu:/sys/kernel/config/pci_ep#

after boot root_port board 

root@ubuntu:/sys/kernel/config/pci_ep# [ 2016.296956] tegra194-pcie 141a0000.pcie_ep: Failed to init UPHY for PCIe EP: -22

root@ubuntu:/sys/kernel/config/pci_ep# dmesg | grep pcie
[    5.941187] tegra194-pcie 141a0000.pcie_ep: Adding to iommu group 9
[    5.953818] tegra194-pcie 141a0000.pcie_ep: Failed to get PERST GPIO: -517
[    5.953830] tegra194-pcie 141a0000.pcie_ep: Failed to parse device tree: -517
[    5.954059] tegra194-pcie 14100000.pcie: Adding to iommu group 10
[    5.966384] tegra194-pcie 14100000.pcie: Using GICv2m MSI allocator
[    5.974965] tegra194-pcie 14160000.pcie: Adding to iommu group 11
[    5.986977] tegra194-pcie 14160000.pcie: Using GICv2m MSI allocator
[    7.246302] tegra194-pcie 141a0000.pcie_ep: Using GICv2m MSI allocator
[    7.253041] tegra194-pcie 141a0000.pcie_ep: Failed to get slot regulators: -517
[    7.262311] tegra194-pcie 14100000.pcie: Using GICv2m MSI allocator
[    7.278158] tegra194-pcie 14100000.pcie: host bridge /pcie@14100000 ranges:
[    7.298009] tegra194-pcie 14100000.pcie:       IO 0x0030100000..0x00301fffff -> 0x0030100000
[    7.306699] tegra194-pcie 14100000.pcie:      MEM 0x20a8000000..0x20afffffff -> 0x0040000000
[    7.315387] tegra194-pcie 14100000.pcie:      MEM 0x2080000000..0x20a7ffffff -> 0x2080000000
[    8.436058] tegra194-pcie 14100000.pcie: Phy link never came up
[    8.442221] tegra194-pcie 14100000.pcie: PCI host bridge to bus 0001:00
[    8.518200] pcieport 0001:00:00.0: Adding to iommu group 10
[    8.524187] pcieport 0001:00:00.0: PME: Signaling with IRQ 65
[    8.530371] pcieport 0001:00:00.0: AER: enabled with IRQ 65
[    8.556101] tegra194-pcie 14160000.pcie: Using GICv2m MSI allocator
[    8.563401] tegra194-pcie 14160000.pcie: host bridge /pcie@14160000 ranges:
[    8.570573] tegra194-pcie 14160000.pcie:       IO 0x0036100000..0x00361fffff -> 0x0036100000
[    8.579260] tegra194-pcie 14160000.pcie:      MEM 0x2428000000..0x242fffffff -> 0x0040000000
[    8.587942] tegra194-pcie 14160000.pcie:      MEM 0x2140000000..0x2427ffffff -> 0x2140000000
[    9.704214] tegra194-pcie 14160000.pcie: Phy link never came up
[    9.710377] tegra194-pcie 14160000.pcie: PCI host bridge to bus 0004:00
[    9.786171] pcieport 0004:00:00.0: Adding to iommu group 11
[    9.792127] pcieport 0004:00:00.0: PME: Signaling with IRQ 67
[    9.798310] pcieport 0004:00:00.0: AER: enabled with IRQ 67
[    9.823346] vdd-3v3-pcie: supplied by vdd-3v3-sys
[    9.877377] tegra194-pcie 141a0000.pcie_ep: Using GICv2m MSI allocator
[   42.419072] vdd-3v3-pcie: disabling
[   42.419124] vdd-12v-pcie: disabling
[ 2016.296956] tegra194-pcie 141a0000.pcie_ep: Failed to init UPHY for PCIe EP: -22
root@ubuntu:/sys/kernel/config/pci_ep#

Iā€™m still with the old problem.

Sorry, I just notice you said ā€œI donā€™t have an external ref_сlk from root port.ā€.

So are you talking about you must enable SRNS?

Yes, enable SRNS and disable spread spectrum.
Iā€™m also concerned about 0V on the pins of the Jetson transmitter UPHY_TX12_P/N, some kind of bias voltage should be there?

So did you check my previous comment or not?

Please explain, I donā€™t quite understand this.
Anyway, i commented ā€œnvidia,enable-ext-refclkā€ in dts file and add nvidia,enable-srns.

I am just revealing the driver code fact to you. This is actually a open source kernel driver.
If you donā€™t understand what I mean, you can download and check that driver code too.
Driver reads the device tree and notice there is ext refclk set and then it goes into that if-else condition.

Maybe your device tree didnā€™t get updated and nvidia,enable-ext-refclk is still there. You could check it during runtime.

ā€œYou could check it during runtimeā€ - could you write how to check this?

root@ubuntu:~# ls /proc/device-tree/pcie_ep@141a0000/
'#address-cells'                       nvidia,cfg-link-cap-l1sub
 clock-names                           nvidia,controller-id
 clocks                                nvidia,device-id
 compatible                            nvidia,disable-aspm-states
 dma-coherent                          nvidia,dl-feature-cap
 interconnect-names                    nvidia,dvfs-tbl
 interconnects                         nvidia,enable-ext-refclk
 interrupt-names                       nvidia,event-cntr-ctrl
 interrupts                            nvidia,event-cntr-data
 iommu-map                             nvidia,host1x
 iommu-map-mask                        nvidia,max-speed
 iommus                                nvidia,ptm-cap-off
 msi-map                               nvidia,refclk-select-gpios
 msi-parent                            phandle
 name                                  phy-names
 num-ib-windows                        phys
 num-lanes                             pinctrl-0
 num-ob-windows                        pinctrl-names
 nvidia,aspm-cmrt                      power-domains
 nvidia,aspm-cmrt-us                   reg
 nvidia,aspm-l0s-entrance-latency      reg-names
 nvidia,aspm-l0s-entrance-latency-us   reset-gpios
 nvidia,aspm-l1-entrance-latency       reset-names
 nvidia,aspm-pwr-on-t                  resets
 nvidia,aspm-pwr-on-t-us              '#size-cells'
 nvidia,aux-clk-freq                   status
 nvidia,bar0-size                      vddio-pex-ctl-supply
 nvidia,bpmp                           vpcie12v-supply
 nvidia,cap-pl16g-cap-off              vpcie3v3-supply
 nvidia,cap-pl16g-status

It is still thereā€¦ the last one in below screenshotā€¦

image

How can I remove this property? I deleted it in :

kernel_tegra234-p3701-0004-p3737-0000.dts

Apparently there is some other file that overwrites my changes?

Do it from the source code itself and rebuild the whole dts.

Could you tell me in which source code files I should make changes?

I donā€™t really memorize the location of which device tree has it. grep it under your hardware directory and see which one has it or not.
Tracing device tree is a common thing.

I edit tegra234-p3701-0004-p3737-0000.dtb file in Linux_For_Tegra/kernel/dtb.

root@zynqup:~# lspci -vvv


01:00.0 RAM memory: NVIDIA Corporation Device 0001
        Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin A routed to IRQ 255
        Region 2: Memory at <unassigned> (64-bit, prefetchable) [disabled]
        Region 4: Memory at <unassigned> (64-bit, non-prefetchable) [disabled]
        Capabilities: [40] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [50] MSI: Enable- Count=1/1 Maskable+ 64bit+
                Address: 0000000000000000  Data: 0000
                Masking: 00000000  Pending: 00000000
        Capabilities: [70] Express (v2) Endpoint, MSI 00
                DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0.000W
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ TransPend-
                LnkCap: Port #0, Speed 16GT/s, Width x8, ASPM L0s L1, Exit Latency L0s <1us, L1 <64us
                        ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+
                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 5GT/s (downgraded), Width x1 (downgraded)
                        TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
                DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported
                DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
                         AtomicOpsCtl: ReqEn-
                LnkCtl2: Target Link Speed: 16GT/s, EnterCompliance- SpeedDis-
                         Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
                         Compliance De-emphasis: -6dB
                LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
                         EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
        Capabilities: [b0] MSI-X: Enable- Count=8 Masked-
                Vector table: BAR=2 offset=00000000
                PBA: BAR=2 offset=00010000
        Capabilities: [100 v2] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
                AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
                        MultHdrRecCap+ MultHdrRecEn- TLPPfxPres- HdrLogCap-
                HeaderLog: 00000000 00000000 00000000 00000000
        Capabilities: [148 v1] Secondary PCI Express <?>
        Capabilities: [168 v1] Physical Layer 16.0 GT/s <?>
        Capabilities: [190 v1] Lane Margining at the Receiver <?>
        Capabilities: [1b8 v1] Latency Tolerance Reporting
                Max snoop latency: 0ns
                Max no snoop latency: 0ns
        Capabilities: [1c0 v1] L1 PM Substates
                L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2- ASPM_L1.1- L1_PM_Substates+
                          PortCommonModeRestoreTime=60us PortTPowerOnTime=40us
                L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
                           T_CommonMode=0us
                L1SubCtl2: T_PwrOn=10us
        Capabilities: [1d0 v1] Vendor Specific Information: ID=0002 Rev=4 Len=100 <?>
        Capabilities: [2d0 v1] Vendor Specific Information: ID=0001 Rev=1 Len=038 <?>
        Capabilities: [308 v1] Data Link Feature <?>
        Capabilities: [314 v1] Precision Time Measurement
                PTMCap: Requester:+ Responder:- Root:-
                PTMClockGranularity: Unimplemented
                PTMControl: Enabled:- RootSelected:-
                PTMEffectiveGranularity: Unknown
        Capabilities: [320 v1] Vendor Specific Information: ID=0003 Rev=1 Len=054 <?>
        Capabilities: [388 v1] Vendor Specific Information: ID=0006 Rev=0 Len=018 <?>
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