Hello,
we are trying to establish pcie to pcie communication between FPGA and SOM..
Here,FPGA acting as endpoint where as SOM acting as a rootcomplex..
So,can you tell the procedure that we need to follow
Hello,
we are trying to establish pcie to pcie communication between FPGA and SOM..
Here,FPGA acting as endpoint where as SOM acting as a rootcomplex..
So,can you tell the procedure that we need to follow
Please refer to PCIe Endpoint Mode — NVIDIA Jetson Linux Developer Guide
This communication guide is between SOM to SOM, same document will work for SOM to FPGA.
we are using X1 between two devices.
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