Hi,
My dev kit is jetson nano 2gb dev kit.
I am trying to modify pinmux according to “customizing_the_jetson_nano_40-pin_expansion_header_v1.2.pdf” and “Tegra_Linux_Driver_Package_Nano_Adaptation_Guide.pdf”
- modify excel sheet to my configuration (NV_Jetson_Nano_DeveloperKit_Users_Pinmux_Configuration.xsl)
- GPIO3_PY.02(pin 15 in 40 pin), GPIO3_PC.00(pin 19), GPIO3_PC.01(pin21), GPIO3_PC.02(pin23) to output 0
- GPIO3_PE.06(pin32) to pwm output
then generate .csv and 2 dtsi files
NV_Jetson_Nano_2GB_DeveloperKit.csv (105.8 KB)
- porting u-boot according to “Tegra_Linux_Driver_Package_Nano_Adaptation_Guide.pdf”
-
./csv-to-board.py p3541(p3541 is defined the above step) and hit the warnings, but ignored the warnings and modify the .h later
WARNING: uart2_rts: F3 mismatch CSV ‘rsvd2’ vs SOC ‘uart’
WARNING: uart2_cts: F3 mismatch CSV ‘rsvd2’ vs SOC ‘uart’
WARNING: Missing gpio_init_vals detected. Manual fixup required -
./board-to-uboot.py p3541 > pinmux-config-p3541.h and again hit the warning
WARNING: Unconfigured pin batt_bcl
- modify .h
initially what I got is:
/*
* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
*
* To generate this file, use the tegra-pinmux-scripts tool available from
* https://github.com/NVIDIA/tegra-pinmux-scripts
* Run "board-to-uboot.py p3541".
*/
#ifndef _PINMUX_CONFIG_P3541_H_
#define _PINMUX_CONFIG_P3541_H_
#define GPIO_INIT(_port, _gpio, _init) \
{ \
.gpio = TEGRA_GPIO(_port, _gpio), \
.init = TEGRA_GPIO_INIT_##_init, \
}
static const struct tegra_gpio_config p3541_gpio_inits[] = {
/* port, pin, init_val */
GPIO_INIT(A, 5, IN),
GPIO_INIT(A, 6, OUT1),
GPIO_INIT(B, 4, IN),
GPIO_INIT(B, 5, IN),
GPIO_INIT(B, 6, IN),
GPIO_INIT(B, 7, IN),
GPIO_INIT(C, 0, OUT?),
GPIO_INIT(C, 1, OUT?),
GPIO_INIT(C, 2, OUT?),
GPIO_INIT(C, 3, OUT?),
GPIO_INIT(C, 4, IN),
GPIO_INIT(G, 2, IN),
GPIO_INIT(G, 3, IN),
GPIO_INIT(H, 0, OUT0),
GPIO_INIT(H, 2, IN),
GPIO_INIT(H, 3, OUT0),
GPIO_INIT(H, 4, OUT0),
GPIO_INIT(H, 5, IN),
GPIO_INIT(H, 6, IN),
GPIO_INIT(H, 7, OUT0),
GPIO_INIT(I, 0, OUT0),
GPIO_INIT(I, 1, IN),
GPIO_INIT(I, 2, OUT0),
GPIO_INIT(J, 4, IN),
GPIO_INIT(J, 5, IN),
GPIO_INIT(J, 6, IN),
GPIO_INIT(J, 7, IN),
GPIO_INIT(S, 5, IN),
GPIO_INIT(S, 7, OUT0),
GPIO_INIT(T, 0, OUT0),
GPIO_INIT(V, 1, IN),
GPIO_INIT(X, 3, OUT1),
GPIO_INIT(X, 4, IN),
GPIO_INIT(X, 5, IN),
GPIO_INIT(X, 6, IN),
GPIO_INIT(Y, 1, IN),
GPIO_INIT(Y, 2, OUT?),
GPIO_INIT(Z, 0, IN),
GPIO_INIT(Z, 2, IN),
GPIO_INIT(Z, 3, OUT0),
GPIO_INIT(BB, 0, IN),
GPIO_INIT(CC, 4, IN),
GPIO_INIT(CC, 7, OUT1),
GPIO_INIT(DD, 0, IN),
};
#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
{ \
.pingrp = PMUX_PINGRP_##_pingrp, \
.func = PMUX_FUNC_##_mux, \
.pull = PMUX_PULL_##_pull, \
.tristate = PMUX_TRI_##_tri, \
.io = PMUX_PIN_##_io, \
.od = PMUX_PIN_OD_##_od, \
.e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \
.lock = PMUX_PIN_LOCK_DEFAULT, \
}
static const struct pmux_pingrp_config p3541_pingrps[] = {
/* pingrp, mux, pull, tri, e_input, od, e_io_hv */
PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI1_CS0_PC3, DEFAULT, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PE6, PWM2, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(NFC_INT_PI1, DEFAULT, NORMAL, TRISTATE, INPUT, DISABLE, DEFAULT),
PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(LCD_BL_PWM_PV0, PWM0, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
PINCFG(CLK_32K_OUT_PY5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL),
PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(PCC7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
};
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
{ \
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
.slwf = _slwf, \
.slwr = _slwr, \
.drvup = _drvup, \
.drvdn = _drvdn, \
.lpmd = PMUX_LPMD_##_lpmd, \
.schmt = PMUX_SCHMT_##_schmt, \
.hsm = PMUX_HSM_##_hsm, \
}
static const struct pmux_drvgrp_config p3541_drvgrps[] = {
};
#endif /* PINMUX_CONFIG_P3541_H */
So I modified anything
GPIO_INIT(…, OUT?) to
GPIO_INIT(C, 0, OUT0)
the attached file is the modified .h
pinmux-config-p3541.h (16.5 KB)
4.build u-boot according to “customizing_the_jetson_nano_40-pin_expansion_header_v1.2.pdf”
5. copy u-boot.bin to the directory (p3541) that I created
6. re-build the device tree image according to “customizing_the_jetson_nano_40-pin_expansion_header_v1.2.pdf”
- copy dtsi files to /Linux_for_Tegra/sources/hardware/nvidia/platform/t210/batuu/kernel-dts/batuu-platforms
tegra210-batuu-gpio-p3448-0003.dtsi (2.0 KB)
tegra210-batuu-pinmux-p3448-0003.dtsi (38.1 KB)
I expected gpio out pins to define here
gpio-output-low = <
TEGRA_GPIO(S, 7) /* gpio 151 */
TEGRA_GPIO(T, 0) /* gpio 152 */
TEGRA_GPIO(Z, 3) /* gpio 203 */
TEGRA_GPIO(H, 0) /* gpio 56 */
TEGRA_GPIO(H, 3) /* gpio 59 */
TEGRA_GPIO(H, 4) /* gpio 60 */
TEGRA_GPIO(H, 7) /* gpio 63 */
TEGRA_GPIO(I, 0) /* gpio 64 */
TEGRA_GPIO(I, 2) /* gpio 66 */
but I don’t see gpios that I set as output low.
7.flash to jetson nano
I expected the pin layout regarding gpio and pwm set by my configurations, but as I checked “/sys/kernel/debug/gpio”, it does not seem to boot up with my configurations.
gpiochip0: GPIOs 0-255, parent: platform/6000d000.gpio, tegra-gpio:
gpio-0 ( )
gpio-1 ( )
gpio-2 ( |pcie_wake ) in hi
gpio-3 ( )
gpio-4 ( )
gpio-5 ( )
gpio-6 ( |system-suspend-gpio ) out hi
gpio-7 ( )
gpio-8 ( )
gpio-9 ( )
gpio-10 ( )
gpio-11 ( )
gpio-12 (SPI1_MOSI )
gpio-13 (SPI1_MISO )
gpio-14 (SPI1_SCK )
gpio-15 (SPI1_CS0 )
gpio-16 (SPI0_MOSI |sysfs ) in lo <--- should be output low
gpio-17 (SPI0_MISO |sysfs ) in lo <--- should be output low
gpio-18 (SPI0_SCK |sysfs ) in lo <--- should be output low
gpio-19 (SPI0_CS0 |sysfs ) in lo <--- should be output low
gpio-20 (SPI0_CS1 )
gpio-21 ( )
gpio-22 ( )
gpio-23 ( )
gpio-24 ( )
gpio-25 ( )
gpio-26 ( )
gpio-27 ( )
gpio-28 ( )
gpio-29 ( )
gpio-30 ( )
gpio-31 ( )
gpio-32 ( ) <--- expect display as PWM something
gpio-33 ( ) <--- expect display as PWM something
gpio-34 ( )
gpio-35 ( )
gpio-36 ( )
gpio-37 ( )
gpio-38 (GPIO13 |sysfs ) in lo
gpio-39 ( |sysfs ) in lo
gpio-40 ( )
gpio-41 ( )
gpio-42 ( )
gpio-43 ( )
gpio-44 ( )
gpio-45 ( )
gpio-46 ( )
gpio-47 ( )
gpio-48 ( )
gpio-49 ( )
gpio-50 (UART1_RTS )
gpio-51 (UART1_CTS )
gpio-52 ( )
gpio-53 ( )
gpio-54 ( )
gpio-55 ( )
gpio-56 ( )
gpio-57 ( )
gpio-58 ( )
gpio-59 ( )
gpio-60 ( )
gpio-61 ( )
gpio-62 ( )
gpio-63 ( )
gpio-64 ( )
gpio-65 ( |? ) out hi
gpio-66 ( |vdd-usb-vbus-en ) out hi
gpio-67 ( )
gpio-68 ( )
gpio-69 ( )
gpio-70 ( )
gpio-71 ( )
gpio-72 ( )
gpio-73 ( )
gpio-74 ( )
gpio-75 ( )
gpio-76 (I2S0_FS )
gpio-77 (I2S0_DIN )
gpio-78 (I2S0_DOUT )
gpio-79 (I2S0_SCLK )
gpio-80 ( )
gpio-81 ( )
gpio-82 ( )
gpio-83 ( )
gpio-84 ( )
gpio-85 ( )
gpio-86 ( )
gpio-87 ( )
gpio-88 ( )
gpio-89 ( )
gpio-90 ( )
gpio-91 ( )
gpio-92 ( )
gpio-93 ( )
gpio-94 ( )
gpio-95 ( )
gpio-96 ( )
gpio-97 ( )
gpio-98 ( )
gpio-99 ( )
gpio-100 ( )
gpio-101 ( )
gpio-102 ( )
gpio-103 ( )
gpio-104 ( )
gpio-105 ( )
gpio-106 ( )
gpio-107 ( )
gpio-108 ( )
gpio-109 ( )
gpio-110 ( )
gpio-111 ( )
gpio-112 ( )
gpio-113 ( )
gpio-114 ( )
gpio-115 ( )
gpio-116 ( )
gpio-117 ( )
gpio-118 ( )
gpio-119 ( )
gpio-120 ( )
gpio-121 ( )
gpio-122 ( )
gpio-123 ( )
gpio-124 ( )
gpio-125 ( )
gpio-126 ( )
gpio-127 ( )
gpio-128 ( )
gpio-129 ( )
gpio-130 ( )
gpio-131 ( )
gpio-132 ( )
gpio-133 ( )
gpio-134 ( )
gpio-135 ( )
gpio-136 ( )
gpio-137 ( )
gpio-138 ( )
gpio-139 ( )
gpio-140 ( )
gpio-141 ( )
gpio-142 ( )
gpio-143 ( )
gpio-144 ( )
gpio-145 ( )
gpio-146 ( )
gpio-147 ( )
gpio-148 ( )
gpio-149 (GPIO01 )
gpio-150 ( )
gpio-151 ( |sysfs ) out lo
gpio-152 ( )
gpio-153 ( )
gpio-154 ( )
gpio-155 ( )
gpio-156 ( )
gpio-157 ( )
gpio-158 ( )
gpio-159 ( )
gpio-160 ( )
gpio-161 ( )
gpio-162 ( )
gpio-163 ( )
gpio-164 ( )
gpio-165 ( )
gpio-166 ( )
gpio-167 ( )
gpio-168 (GPIO07 )
gpio-169 ( )
gpio-170 ( )
gpio-171 ( )
gpio-172 ( )
gpio-173 ( )
gpio-174 ( )
gpio-175 ( )
gpio-176 ( )
gpio-177 ( )
gpio-178 ( )
gpio-179 ( )
gpio-180 ( )
gpio-181 ( )
gpio-182 ( )
gpio-183 ( )
gpio-184 ( )
gpio-185 ( )
gpio-186 ( )
gpio-187 ( )
gpio-188 ( )
gpio-189 ( |Power ) in hi IRQ
gpio-190 ( |Forcerecovery ) in hi IRQ
gpio-191 ( )
gpio-192 ( )
gpio-193 ( )
gpio-194 (GPIO12 |sysfs ) in lo
gpio-195 ( )
gpio-196 ( )
gpio-197 ( )
gpio-198 ( )
gpio-199 ( )
gpio-200 (GPIO11 )
gpio-201 ( |cd ) in lo IRQ
gpio-202 ( |pwm-fan-tach ) in hi IRQ
gpio-203 ( |vdd-3v3-sd ) out hi
gpio-204 ( )
gpio-205 ( )
gpio-206 ( )
gpio-207 ( )
gpio-208 ( )
gpio-209 ( )
gpio-210 ( )
gpio-211 ( )
gpio-212 ( )
gpio-213 ( )
gpio-214 ( )
gpio-215 ( )
gpio-216 (GPIO09 )
gpio-217 ( )
gpio-218 ( )
gpio-219 ( )
gpio-220 ( )
gpio-221 ( )
gpio-222 ( )
gpio-223 ( )
gpio-224 ( )
gpio-225 ( |hdmi2.0_hpd ) in hi IRQ
gpio-226 ( )
gpio-227 ( )
gpio-228 ( |extcon:extcon@1 ) in lo IRQ
gpio-229 ( )
gpio-230 ( )
gpio-231 ( |? ) out hi
gpio-232 (SPI1_CS1 )
gpio-233 ( )
gpio-234 ( )
gpio-235 ( )
gpio-236 ( )
gpio-237 ( )
gpio-238 ( )
gpio-239 ( )
8.decompile dtb to dts
output_2.dts (306.9 KB)
- Not sure of "nvidia, function = “rsvd1”
but I see the enable-input = 0 which I guess set to output for example
spi1_mosi_pc0 {
nvidia,pins = "spi1_mosi_pc0";
nvidia,function = "rsvd1";
nvidia,pull = <0x1>;
nvidia,tristate = <0x0>;
nvidia,enable-input = <0x0>;
};
I am not sure what I have done wrong and how to fix it, so welcome to any feedback!!
Thanks,
Jin