PWM - resolution of pulse width


I am trying to use PWM signal (pin 33) to control a servo. I found that there are not many steps to divide the pulse width between 1 and 2 ms. The resolution I get is approx. a 0.04 ms increment, which divides the interval into roughly 25 steps. The dedicated servo driver (PCA9685) is able at the division to at leasts 180 steps (increment of approx 0.005 ms).

Is there a way to raise the PWM resolution of Xavier NX? Or do I understand it wrongly?

Thank you!

hello mmmysl,

may I know what’s your device tree property settings to retrieve the duty cycle.
you may also refer to kernel documentation for some details,
for example,

Hello JerryChang,

I do not understand how the device tree relates to the duty cycle - isn´t the pwm managed separately through commands such as
# echo 10000 > period
# echo 6000 > duty_cycle
# echo 1 > enable ?

I looked into the documentation you suggested and checked the Device Tree (DT). I do not understand how the pwmchip controls its properties.
For example, If I take the pwmchip4 which controls the pwm on GPIO 40-header pin 32 (/sys/devices/32f0000.pwm), in the DT it is defined as:
pwm@32f0000 {
compatible = "nvidia,tegra194-pwm";
reg = <0x0 0x32f0000 0x0 0x10000>;
nvidia,hw-instance-id = <0x7>;
clocks = <0x4 0x70>;
clock-names = "pwm";
#pwm-cells = <0x2>;
resets = <0x5 0x4b>;
reset-names = "pwm";
status = "okay";
linux,phandle = <0xfd>;
phandle = <0xfd>;

Right now there is no pwm-regulator inside the DT.

  1. How do the pwmchips manage the pwm output without the regulator?
  2. Would creation of a pwm-regulator inside the DT solve this?

Many thanks!

hello mmmysl,

you may also use kernel API, pwm_config() , to change a PWM device configuration.
i.e. $L4T_Sources/r32.4.3/Linux_for_Tegra/source/public/kernel/kernel-4.9/include/linux/pwm.h

there’s parent clock of PWM, the maximum pwm frequency equals to the parent clk output divided by 256.
you may change parent clock if you would need higher frequency.
please also access Xavier TRM and check Chapter-10.7 Pulse Width Modulator (PWM).

I found the answer to my question. As stated in the TRM (page 8096): “Each generated pulse has an n/256 duty cycle”.
So the duty cycle is divided into 255 steps. I assume that is a hardware limitation, given the pwm diagram:

Good to know when you want to control servos.

Thank you JerryChang for pointing me to the right document.