The development team is investigating the issue and can reproduce the issue.
On the Details page:
- SOL L1 (l1tex__throughput.avg.pct_of_peak_sustained_active) is correct.
- SOL L1: Data Bank Reads/Write [%] (l1tex__data_banks_{reads,writes}.avg.pct_of_peak_sustained_elapsed) is correct.
- Shared Memory Bank Conflicts (l1tex__data_bank_conflicts_{reads,writes}.avg.pct_of_peak_sustained_elapsed) hardware performance counter is showing a value higher than expected. It also counts certain types of stalled cycles.
On the Source page:
- the Memory L1 Transactions Shared and Memory Ideal L1 Transactions Shared are correct.
If SOL L1: Data Bank Reads/Writes is high then please go to the Source page and determine if there are Memory L1 Transactions Shared > Ideal Memory L1 Transactions Shared.