hello 913775933,
PHY_INTR = 0x10 means there’s Rx FIFO overflow failure.
since you’re having FPGA device to output the signaling, this might due to your FPGA configuration errors.
you may also dig into TRM for checking MIPI-CSI registers, PF_CRC and PH_WC.
those two registers can be used to check the errors for each packet. i.e. PH is the packet header and PF is packet footer.
you may also refer to TRM for the address offset,
for example, here’s commands to check stream-0, PH_WC, $ sudo ./busybox devmem 0x15a101dc
thanks