Hi everyone,
We use TX1 development board the bsp version is R28.2, the camera board is e3323 which has two ov23850. When we play on the two cameras one can succeed and the other fails, the fail log as below:
kernel: [ 3862.513727] tegra-vii2c 546c0000.i2c: --- register dump for debugging ----
kernel: [ 3862.520707] tegra-vii2c 546c0000.i2c: I2C_CNFG - 0x20800
kernel: [ 3862.526147] tegra-vii2c 546c0000.i2c: I2C_PACKET_TRANSFER_STATUS - 0x0
kernel: [ 3862.532713] tegra-vii2c 546c0000.i2c: I2C_FIFO_CONTROL - 0xe0
kernel: [ 3862.538503] tegra-vii2c 546c0000.i2c: I2C_FIFO_STATUS - 0x800040
kernel: [ 3862.538522] vi 54080000.vi: TEGRA_CSI_PIXEL_PARSER_STATUS 0x00000000
kernel: [ 3862.538525] vi 54080000.vi: TEGRA_CSI_CIL_STATUS 0x00000000
kernel: [ 3862.538528] vi 54080000.vi: TEGRA_CSI_CILX_STATUS 0x00000000
kernel: [ 3862.562113] tegra-vii2c 546c0000.i2c: I2C_INT_MASK - 0xac
kernel: [ 3862.567538] tegra-vii2c 546c0000.i2c: I2C_INT_STATUS - 0x0
kernel: [ 3862.573048] tegra-vii2c 546c0000.i2c: msg->len - 3
kernel: [ 3862.577873] tegra-vii2c 546c0000.i2c: is_msg_write - 1
kernel: [ 3862.583131] tegra-vii2c 546c0000.i2c: buf_remaining - 0
kernel: [ 3862.588390] tegra-vii2c 546c0000.i2c: i2c transfer timed out, addr 0x0010, data 0x30
kernel: [ 3862.596578] regmap_util_write_table_8:regmap_util_write_table:-110
I use R24.2 bsp it works well, I think there are something wrong with 546c0000.i2c input clock, how can fix it? Thanks.