TX2, two denver CPUs or one CPU with two denver cores? Four ARM A57 CPUs or one ARM CPU with four cores?

Even they are Arms, let’s just say CPU to simply the definition.

As stated in the headline, TX2,
two denver CPUs or one CPU with two denver cores?
Four ARM A57 CPUs or one ARM CPU with four A57 cores?

Do the two denver share cache?
Do the four A57 share cache?

Hi heyworld,

Please see “CHAPTER 1: INTRODUCTION” of “Tegra X2 (Parker Series SoC) Technical Reference Manual”. You can get it from https://developer.nvidia.com/embedded/downloads .

Hi vickyy,

This is what I got from introduction.
The Denver 2 processors each have 128 KB Instruction and 64 KB Data Level 1 caches; and have a 2MB shared Level 2 unified cache. The Cortex-A57 processors each have 48 KB Instruction and 32 KB Data Level 1 caches; and also have a 2 MB shared Level 2 unified cache.

So in summary, two Denvers have independent L1 cache, shared L2 cache.
four A57 have independent L1 cache, shared L2 chache.

In this case, do we call two Denvers as one CPU with two cores or two CPUs?
Same question with four A57.